Directorio
FRANCISCO VIDAL FERNANDEZ FERNANDEZ
Categoría
Catedrático de Universidad
Contacto
Correo electrónico
Departamento
Área
Electrónica
Docencia
Asignaturas que imparte
- Aplicaciones de Soft Computing
- Aplicaciones de Soft Computing
- Aplicaciones de Soft Computing
- Aplicaciones de Soft Computing
- Circuitos Eléctricos: Teoría e Instrumentación
- Circuitos Eléctricos: Teoría e Instrumentación
- Circuitos Eléctricos: Teoría e Instrumentación
- Circuitos Eléctricos. Teoría e Instrumentación
- Metodologías de Diseño y Herramientas de CAD
- Trabajo Fin de Máster
Investigación
Grupo de investigación
INGENIERÍA DE CIRCUITOS Y SISTEMAS MICRO/NANO-MÉTRICOS (MINCAS)
Proyectos y contratos de investigación
TESTABILITY OF ANALOG MACROCELLS EMBEDDED INTO SYSTEM ON CHIP (IST 2001 34283 - Investigador/a)
ENTREFASES ANALOGICO-DIGITALES RECONFIGURABLES PARA LA CONVERGENCIA DE SISTEMAS DE COMUNICACIONES INALAMBRICOS Y ALAMBRICOS (TEC2004-01752 - Responsable)
AYUDA A LA CONSOLIDACION DEL GRUPO DE INVESTIGACIÓN TIC-179 (CONVOCATORIA 2004) (2005/134 - Responsable)
SPIRIT. SECURED PLATFORM FOR INTELLIGENT AND RECONFIGURABLE VOICE AND DATA TERMINALS (FIT-330100-2005-255 - Responsable)
SECURED PLATFORM FOR INTELLIGENT AND RECONFIGURABLE VOICE AND DATA TERMINALS (FIT-330100-2006-134 - Responsable)
DISEÑO DE BANDA BASE Y PLATAFORMAS DE DISEÑO PARA SISTEMAS DE TELECOMUNICACIÓN ADAPTATIVOS 4G INTEGRADOS EN TECNOLOGÍAS CMOS NANOMÉTRICAS (TEC2007-67247-C02-01/MIC - Investigador/a)
PLATFORM4G: DESARROLLO DE UNA PLATAFORMA DE DISEÑO DE SISTEMAS ADAPTABLES PARA SISTEMAS DE TELECOMUNICACIONES DE CUARTA GENERACIÓN (P07-TIC-02532 - Responsable)
AYUDA A LA CONSOLIDACION DE GRUPOS DE INVESTIGACION TIC 179. CONVOCATORIA 2006 (P-2007/422 - Responsable)
AYUDA A LA CONSOLIDACION DE GRUPOS DE INVESTIGACION - TIC 179 CONVOCATORIA 2007 (P-2008/412 - Investigador/a)
AYUDA A LA CONSOLIDACION DE GRUPOS DE INVESTIGACION - TIC 179 CONVOCATORIA 2008 (2009/00000436 - Investigador/a)
AYUDA A LA CONSOLIDACION DE GRUPOS DE INVESTIGACIÓN - TIC 179 CONVOCATORIA 2009 (2009/00001258 - Investigador/a)
CIRCUITOS ANALOGICOS FLEXIBLES PARA LA PROXIMA GENERACION DE TERMINALES MÓVILES BASADOS EN RADIO DEFINIDA POR SOFTWARE INTEGRADOS EN TECNOLOGIAS CMOS (TEC2010-14825 - Investigador/a)
OPTIMIZACION DE CIRCUITOS DINÁMICOS NO LINEALES APLICANDO ALGORITMOS EVOLUTIVOS (131839 - Investigador/a)
DISEÑO PARA REUTILIZACIÓN DE CONVERTIDORES ANALOGICOS/DIGITALES DE ALTA VELOCIDAD Y ALTA RESOLUCION (TIC2001-0929 - Responsable)
DISEÑO PARA CONVERTIDORES A/D DE ALTA RESOLUCION EN TECNOLOGIAS SUBMICROMETRICAS (TIC97-0580 - Investigador/a)
ANALOG MODELLING AND DESIGN USING A SYMBOLIC ENVIRONMENT (ESPRIT-21812 - Responsable)
INNOVATIVE SIGNAL PROCESSING EXPLOITING CHAOTIC DYNAMICS (ESPRIT-31103 - Investigador/a)
RETARGETABILITY FOR REUSABILITY OF APPLICATIONS-DRIVEN-QUADRATURE D/A INTERFACE BLOCK DESIGN (ESPRIT-29648 - Investigador/a)
TECHNICAL COORDINATION AND DISSEMINATION ON RE-TARGETABLE RE-USABLE MIXED-SIGNAL DESIGN (IC&D EP 29648 - Investigador/a)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-037/03 - Responsable)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-007/99 - Responsable)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (ESPRIT 21458-SIGYRO) (OG-062/00 - Investigador/a)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (ESPRIT 21812-AMADEUS) (OG-065/00 - Responsable)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST. (ESPRIT 25213 - TARDIS) (OG-021/02 - Investigador/a)
ARTICULO 11/45 DEL PROYECTO AMADEUS (2000/1002 - Responsable)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (MIXMODEST-29261) (OG-019/02 - Investigador/a)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST. (ESPRIT 21812 - AMADEUS) (OG-024/02 - Responsable)
ARTICULO 68/83 DEL PROYECTO RAPID (2003/640 - Responsable)
MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (68/83) (OG-082/04 - Investigador/a)
DESARROLLO DE UN CONJUNTO DE CELDAS PARAMETRIZADAS DE LAYOUT SOBRE LA TECNOLOGÍA CMOS 0.13 MICRÓMETROS DE ATMEL. (ATMEL - Investigador/a)
DESIGN OF A SIGMA-DELTA MODULATOR FOR ADSL6 (ADSL6 - Investigador/a)
Power, reliability and security challenges in advanced CMOS and beyond-CMOS devices and circuits (RESURGENCE) (US-1380876 - Investigador/a)
NANOVAR: Red Temática en Variabilidad en Nanoelectrónica (TEC2014-53909-REDT - Responsable)
Dispositivos, Circuitos y Arquitecturas Fiables y de Bajo Consumo para Iot (TEC2016-75151-C3-3-R - Responsable)
Aproximación Multinivel al Diseño Orientado a la Fiabilidad de Circuitos Integrados Analógicos y Digitales (TEC2013-45638-C3-3-R - Responsable)
Flexics: Técnicas de Diseño de Circuitos y Sistemas Micro-Nanoelectrónicos Flexibles y Reconfigurables de Bajo Consumo y Bajo Coste Aplicados a Comuni (P12-TIC-1481 - Responsable)
Desarrollo de Kit de diseño de tecnología cerámica LTCC: modelado, simulación y fabricación de componentes y circuitos, y metodología de diseño (RTC-2014-2426-7 - Investigador/a)
VARIABLES: Red Española de Variabilidad en Tecnologías, Circuitos y Sistemas (TEC2011-15599-e - Responsable)
Modelado y Síntesis de circuitos analógicos, de señal-mixta y radiofrecuencia robustos y flexibles (201350E058 - Investigador/a)
ORGANIZACION DEL CONGRESO INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (TEC2011-15501-E (subprograma MIC) - Investigador/a)
Estancias de excelencia Junta de Andalucia (IAC 3/2007 - Responsable)
AD2000: ADVANCED CMOS ANALOGUE-DIGITAL-ANALOGUE CONVERTERS (ESPRIT 5056 - Investigador/a)
ADCIS: Analog-Digital CMOS ICs (ESPRIT 2193 - Investigador/a)
TARDIS (25213 - Participante)
Multistandard integrated devices for broadband DSL access and in-home powerline communications (MIDAS) (A110 MIDAS - Investigador/a)
Jornadas de seguimiento de proyectos de investigacion TEC del Plan Nacional. Edicion 2007 (TEC2007-29620E - Responsable)
Enhancements to ASAP (Responsable)
AYUDA A LA CONSOLIDACION DE GRUPOS DE INVESTIGACION TIC 179. CONVOCATORIA 2005 (ARM 1364 - Responsable)
Libros publicados
F. Passos;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Automated Hierarchical Synthesis of Radio-Frequency Integrated Circuits and Systems. A Systematic and Multilevel Approach. Springer. 2020. 978-3-030-47246-7
Automated Hierarchical Synthesis of Radio-Frequency Integrated Circuits and Systems. A Systematic and Multilevel Approach. Springer. 2020. 978-3-030-47246-7
Liu, Bo;Gielen, Georges;Fernandez-Fernandez, Francisco V.:
Automated design of analog and high-frequency circuits: a computational intelligence approach.. Springer. 2014. 978-3-642-39161-3
Automated design of analog and high-frequency circuits: a computational intelligence approach.. Springer. 2014. 978-3-642-39161-3
Fakhfakh, Mourad ;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.:
Design of analog circuits through symbolic analysis. Bentham Science Publishers. 2012. 978-1-60805-425-1
Design of analog circuits through symbolic analysis. Bentham Science Publishers. 2012. 978-1-60805-425-1
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Guerra-Vinuesa, Oscar;Rodriguez-Vazquez, Angel:
REUSE-BASED METHODOLOGIES AND TOOLS IN THE DESIGN OF ANALOG AND MIXED-SIGNAL INTEGRATED CIRCUITS. Springer. 2006. 1-4020-5126-3
REUSE-BASED METHODOLOGIES AND TOOLS IN THE DESIGN OF ANALOG AND MIXED-SIGNAL INTEGRATED CIRCUITS. Springer. 2006. 1-4020-5126-3
López-,J. F.;Fernandez-Fernandez, Francisco V.;López-Villegas-,J.M.;Rosa-Utrera, Jose Manuel De La:
VLSI CIRCUITS AND SYSTEMS II: 9-11 MAY 2005, SEVILLE, SPAIN. SPIE. 2005. 0-8194-5832-5
VLSI CIRCUITS AND SYSTEMS II: 9-11 MAY 2005, SEVILLE, SPAIN. SPIE. 2005. 0-8194-5832-5
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas-Diaz, Jose Luis;Gielen-,G.:
SYMBOLIC ANALYSIS TECHNIQUES. APPLICATIONS TO ANALOG DESIGN AUTOMATION. IEEE PRESS. 1998. 0-7803-1075-6
SYMBOLIC ANALYSIS TECHNIQUES. APPLICATIONS TO ANALOG DESIGN AUTOMATION. IEEE PRESS. 1998. 0-7803-1075-6
Capítulos en Libros
F. Passos;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
On the usage of machine-learning techniques for the accurate modeling of integrated inductors for RF applications. Pág. 155-178. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. 2020.
On the usage of machine-learning techniques for the accurate modeling of integrated inductors for RF applications. Pág. 155-178. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. 2020.
Martin-martinez, Javier;Nafria, Montserrat;Diaz-fortuny, Javier;Toro-frías, Antonio;Martín, Pablo;Sarazá, Pablo;Castro-López, Rafael;Rodriguez, Rosana;Roca, E.;Fernandez-Fernandez, Francisco V.:
Modeling of variability and reliability in analog circuits. Pág. 179-206. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. 2020.
Modeling of variability and reliability in analog circuits. Pág. 179-206. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. THE INSTITUTION OF ENGINEERING AND TECHNOLOGY. 2020.
Carbajal-gomez, Victor Hugo;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.:
Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponent. Pág. 627-651. Springer International Publishing. Springer International Publishing. 2016.
Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponent. Pág. 627-651. Springer International Publishing. Springer International Publishing. 2016.
Liu, Bo;Fernandez-Fernandez, Francisco V.;Gielen, Georges;Karkar, Ammar;Yakovlev, Alex;Grout, Vic:
SMAS: A Generalized and Efficient Framework for Computationally Expensive Electronic Design Optimization Problems. Pág. 251-275. Springer International Publishing. Springer International Publishing. 2015.
SMAS: A Generalized and Efficient Framework for Computationally Expensive Electronic Design Optimization Problems. Pág. 251-275. Springer International Publishing. Springer International Publishing. 2015.
Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Gonzalez-Echevarria, Reinier;Sieiro, Javier;Vidal, Neus;Lopez-villegas, Jose Maria:
Computational Intelligence Techniques for Determining Optimal Performance Trade¿Offs for RF Inductors. Pág. 277-296. Springer International Publishing. Springer International Publishing. 2015.
Computational Intelligence Techniques for Determining Optimal Performance Trade¿Offs for RF Inductors. Pág. 277-296. Springer International Publishing. Springer International Publishing. 2015.
Carbajal-gomez, Victor Hugo;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.:
Application of Computational Intelligence Techniques to Maximize Unpredictability in Multiscroll Chaotic Oscillators. Pág. 59-81. Springer International Publishing. Springer International Publishing. 2015.
Application of Computational Intelligence Techniques to Maximize Unpredictability in Multiscroll Chaotic Oscillators. Pág. 59-81. Springer International Publishing. Springer International Publishing. 2015.
Fernandez-Fernandez, Francisco V.;Sanchez-Lopez, Carlos;Castro-López, Rafael;Roca-Moreno, Elisenda:
Approximation techniques in symbolic circuit analysis. Pág. 173-201. Bentham Science Publishers. Bentham Science Publishers. 2012.
Approximation techniques in symbolic circuit analysis. Pág. 173-201. Bentham Science Publishers. Bentham Science Publishers. 2012.
Fernandez-Fernandez, Francisco V.;Sanchez-Lopez, Carlos;Castro-López, Rafael;Roca-Moreno, Elisenda:
Symbolic pole/zero analysis. Pág. 287-304. Bentham Science Publishers. Bentham Science Publishers. 2012.
Symbolic pole/zero analysis. Pág. 287-304. Bentham Science Publishers. Bentham Science Publishers. 2012.
Tlelo-cuautle, Esteban;Martinez-romero, Elionay;Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.;Tan, Sheldon;Li, Peng;Fakhfakh, Mourad:
Behavioral Modeling of Mixed-Mode Integrated Circuits. Pág. 85-108. Intech. Intech. 2011.
Behavioral Modeling of Mixed-Mode Integrated Circuits. Pág. 85-108. Intech. Intech. 2011.
Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
CLOSING THE GAP BETWEEN ELECTRICAL AND PHYSICAL DESIGN: THE LAYOUT-AWARE SOLUTION. Pág. 243-267. Springer. Springer. 2010.
CLOSING THE GAP BETWEEN ELECTRICAL AND PHYSICAL DESIGN: THE LAYOUT-AWARE SOLUTION. Pág. 243-267. Springer. Springer. 2010.
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
MIXED ANALOGUE/DIGITAL AND RF. Pág. 105-122. MEDEA +. MEDEA +. 2005.
MIXED ANALOGUE/DIGITAL AND RF. Pág. 105-122. MEDEA +. MEDEA +. 2005.
Fernandez-Fernandez, Francisco V.;Rio-Fernandez, Rocio Del;Castro-López, Rafael;Medeiro-Hidalgo, Fernando Manuel;Guerra-Vinuesa, Oscar;Perez-Verdu, Maria Belen:
DESIGN METHODOLOGIES FOR SIGMA-DELTA CONVERTERS. Pág. 523-559. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 2003.
DESIGN METHODOLOGIES FOR SIGMA-DELTA CONVERTERS. Pág. 523-559. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 2003.
Wambacq, Piet;Fernandez-Fernandez, Francisco V.;Gielen, Georges;Sansen, Willy;Rodriguez-Vazquez, Angel:
Efficient Symbolic Computation of Approximated Small-Signal Characteristics of Analog Integrated Circuits. Pág. 320-321. 2002.
Efficient Symbolic Computation of Approximated Small-Signal Characteristics of Analog Integrated Circuits. Pág. 320-321. 2002.
Medeiro-Hidalgo, Fernando Manuel;Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Rodriguez-Vazquez, Angel:
A Statistical Optimization Based Approach for Automated Sizing of Analog Cells. Pág. 164-167. 2002.
A Statistical Optimization Based Approach for Automated Sizing of Analog Cells. Pág. 164-167. 2002.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas-Diaz, Jose Luis:
Interactive AC Modeling and Characterization of Analog Circuits via Symbolic Analysis. Pág. 287-312. 2002.
Interactive AC Modeling and Characterization of Analog Circuits via Symbolic Analysis. Pág. 287-312. 2002.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
SYMBOLIC FORMULA APPROXIMATION. Pág. 141-178. IEEE PRESS. IEEE PRESS. 1998.
SYMBOLIC FORMULA APPROXIMATION. Pág. 141-178. IEEE PRESS. IEEE PRESS. 1998.
Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.;Huertas-Diaz, Jose Luis:
INTRODUCTION. Pág. 1-26. IEEE PRESS. IEEE PRESS. 1998.
INTRODUCTION. Pág. 1-26. IEEE PRESS. IEEE PRESS. 1998.
Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Huertas-Diaz, Jose Luis;Rodriguez-Vazquez, Angel:
STATISTICAL DESIGN: GLOBAL DESIGN OF ANALOG CELLS USING STATISTICAL OPTIMIZATION TECHNIQUES. Pág. 10-20. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 1996.
STATISTICAL DESIGN: GLOBAL DESIGN OF ANALOG CELLS USING STATISTICAL OPTIMIZATION TECHNIQUES. Pág. 10-20. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 1996.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martín-,J.D;Huertas-Diaz, Jose Luis:
FORMULA APPROXIMATION FOR FLAT AND HIERARCHICAL SYMBOLIC ANALYSIS. Pág. 43-58. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 1993.
FORMULA APPROXIMATION FOR FLAT AND HIERARCHICAL SYMBOLIC ANALYSIS. Pág. 43-58. KLUWER ACADEMIC PUBLISHERS. KLUWER ACADEMIC PUBLISHERS. 1993.
Participación en congresos
Fernandez-Fernandez, Francisco V.:
International Symposium on Power and Timing Modeling, Optimization and Simulation . Thessaloniki, Greece. 2017
International Symposium on Power and Timing Modeling, Optimization and Simulation . Thessaloniki, Greece. 2017
Asistencia a congresos
F. Passos;Sarazá, Pablo;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Dealing with hierarchical partitioning in bottom-up design methodologies. Ponencia en Congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuits Design. Erfurt (Alemania). 2021
Dealing with hierarchical partitioning in bottom-up design methodologies. Ponencia en Congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuits Design. Erfurt (Alemania). 2021
Camacho-Ruiz, Eros;Sarazá, Pablo;Castro-López, Rafael;Roca, E.;Brox-Jimenez, Piedad;Fernandez-Fernandez, Francisco V.:
Presentación oral con la ponencia denominada: "A study of SRAM PUFs reliability using the Static Noise Margin". Ponencia en Congreso. The 2021 edition of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Online. 2021
Presentación oral con la ponencia denominada: "A study of SRAM PUFs reliability using the Static Noise Margin". Ponencia en Congreso. The 2021 edition of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Online. 2021
Sarazá, Pablo;Camacho-Ruiz, Eros;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodríguez, Rosana;Nafría, Montserrat;Fernandez-Fernandez, Francisco V.:
Simulating the impact of random telegraph noise on integrated circuits. Ponencia en Congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuits Design. Erfurt (Alemania). 2021
Simulating the impact of random telegraph noise on integrated circuits. Ponencia en Congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuits Design. Erfurt (Alemania). 2021
Nafria, Montserrat;Mateo, Diego;Baraja, Enrique;Aragones, Xavier;Fernandez-Fernandez, Francisco V.;Diaz-fortuny, Javier;Sarazá, Pablo;Martin-martinez, Javier;Roca, E.;Castro-López, Rafael;Rodríguez, Rosana;Martín, Pablo;Toro-frías, Antonio:
Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock. Ponencia en Congreso. IEEE Latin America Electron Devices Conference. - Mexico. 2021
Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock. Ponencia en Congreso. IEEE Latin America Electron Devices Conference. - Mexico. 2021
Sarazá, Pablo;Carrasco-lopez, Hector;Brox-Jimenez, Piedad;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Improving the reliability of SRAM-based PUFs in the presence of aging. Comunicación en congreso. IEEE 15th Design & Technology of Integrated Systems in Nanoscale Era . Marrakech (Marruecos). 2020
Improving the reliability of SRAM-based PUFs in the presence of aging. Comunicación en congreso. IEEE 15th Design & Technology of Integrated Systems in Nanoscale Era . Marrakech (Marruecos). 2020
Martín, Pablo;Nuñez-Martínez, Juan;Roca, E.;Castro-López, Rafael;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
Diaz-fortuny, Javier;Sarazá, Pablo;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
F. Passos;Roca, E.;Castro-López, Rafael;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
Nuñez-Martínez, Juan;Roca, E.;Castro-López, Rafael;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019
Sarazá, Pablo;Diaz-fortuny, Javier;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition . Florencia (italia). 2019
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition . Florencia (italia). 2019
Pedreira, Gerard;Martin-martinez, Javier;Diaz-fortuny, Javier;Sarazá, Pablo;Rodriguez, Rosana;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
A new time efficient methodology for the massive characterization of RTN in CMOS devices. Comunicación en congreso. 2019 IEEE International Reliability Physics Symposium . Monterey, Asilomar, Pacific Grove, ASILOMAR, PACIFIC GROVE, CALIFORNIA (USA). 2019
A new time efficient methodology for the massive characterization of RTN in CMOS devices. Comunicación en congreso. 2019 IEEE International Reliability Physics Symposium . Monterey, Asilomar, Pacific Grove, ASILOMAR, PACIFIC GROVE, CALIFORNIA (USA). 2019
Toro-frías, Antonio;Fernandez-Fernandez, Francisco V.;Sarazá, Pablo;F. Passos;Martín, Pablo;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat:
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition . Florencia (italia). 2019
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition . Florencia (italia). 2019
Barajas, Enrique;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Aragones, Xavier;Mateos, Diego;Moll, Francesc;Rubio, Antonio;Martin-martinez, Javier;Rodriguez, Rosana;Porti, Marc;Nafria, Montserrat:
Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology. Comunicación en congreso. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation . Platja D'Aro. 2018
Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology. Comunicación en congreso. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation . Platja D'Aro. 2018
Díaz-fortuny, Javier;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
CMOS characterization and compact modelling for circuit reliability simulation. Comunicación en congreso. 24th International Symposium on On-Line Testing and Robust System Design . PLATJA D'ARO, GIRONA, ESPAÑA. 2018
CMOS characterization and compact modelling for circuit reliability simulation. Comunicación en congreso. 24th International Symposium on On-Line Testing and Robust System Design . PLATJA D'ARO, GIRONA, ESPAÑA. 2018
Toro-frías, Antonio;Martín, Pablo;Martin-martinez, Javier;Castro-López, Rafael;Roca, E.;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Diaz-fortuny, Javier;Saraza-canflanca, Pablo;Toro-frías, Antonio;Castro-López, Rafael;Martin-martinez, Javier;Roca, E.;Rodriguez, Rosana;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
A Model Parameter Extraction Methodology Including Time-dependent Variability for Circuit Reliability Simulation. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
A Model Parameter Extraction Methodology Including Time-dependent Variability for Circuit Reliability Simulation. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Saraza-canflanca, Pablo;Diaz-fortuny, Javier;Toro-frías, Antonio;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
Automated massive RTN characterization using a transistor array chip. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Automated massive RTN characterization using a transistor array chip. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Moreira, Fabio ;Martins, Ricardo;Lourenço, Nuno;Roca, E.;Castro-López, Rafael;Povoa, Ricardo;Canelas, Antonio;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Saraza-canflanca, Pablo;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.;Malagon, Daniel;Moreira, Fabio ;Toro-frías, Antonio;Nuñez-Martínez, Juan;Castro-López, Rafael;Roca, E.;Diaz-fortuny, Javier;Martin-martinez, Javier:
Design considerations of an SRAM array for the statistical validation of time-dependent variability models. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Design considerations of an SRAM array for the statistical validation of time-dependent variability models. Comunicación en congreso. 15TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN. - Praga, República Checa. 2018
Diaz-fortuny, Javier;Martin-martinez, Javier;Rodriguez, Rosana;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
A Noise and RTN-Removal Smart Method for the Parameter Extraction of CMOS Aging Compact Models. Comunicación en congreso. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Granada (España). 2018
A Noise and RTN-Removal Smart Method for the Parameter Extraction of CMOS Aging Compact Models. Comunicación en congreso. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Granada (España). 2018
Van Santen, Victor M.;Nafria, Montserrat;Diaz-fortuny, Javier;Amrouch, Hussam;Martin-martinez, Javier;Rodriguez, Rosana;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Henkel, Jörg:
Weighted Time Lag Plot Defect Parameter Extraction and GPU-based BTI Modeling for BTI Variability. Poster en Congreso. 2018 IEEE International Reliability Physics Symposium . Burlingame, California (USA). 2018
Weighted Time Lag Plot Defect Parameter Extraction and GPU-based BTI Modeling for BTI Variability. Poster en Congreso. 2018 IEEE International Reliability Physics Symposium . Burlingame, California (USA). 2018
Toro-frías, Antonio;Martín, Pablo;Martin-martinez, Javier;Castro-López, Rafael;Rodriguez, Rosana;Roca, E.;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
Efficient Computation of Yield and Lifetime for Analog ICs under Process Variabiliy and Aging. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017
Efficient Computation of Yield and Lifetime for Analog ICs under Process Variabiliy and Aging. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017
Diaz-fortuny, Javier;Mateos, Diego;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Barajas, Enrique;Aragones, Xavier:
Statistical characterization of reliability effects in nanometer CMOS using a versatile transistor array IC. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017
Statistical characterization of reliability effects in nanometer CMOS using a versatile transistor array IC. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017
Diaz-fortuny, Javier;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Statistical characterization of unreliability effects in a 65-nm CMOS transistor array. Comunicación en congreso. 22nd International Mixed-Signal Testing Workshop. Thessaloniki (Greece). 2017
Statistical characterization of unreliability effects in a 65-nm CMOS transistor array. Comunicación en congreso. 22nd International Mixed-Signal Testing Workshop. Thessaloniki (Greece). 2017
Martins, Ricardo;Lourenço, Nuno;Povoa, Ricardo ;Canelas, Antonio;Horta, Nuno;Moreira, Fabio ;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Diaz-fortuny, Javier;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
TARS: A toolbox for statistical reliability modeling of CMOS devices. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
TARS: A toolbox for statistical reliability modeling of CMOS devices. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Toro-frías, Antonio;Martín, Pablo;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat:
Including a stochastic model of aging in a reliability simulation flow. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Including a stochastic model of aging in a reliability simulation flow. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Ahyoune, Saiyd;Sieiro, Javier;Carrasco, Tomas;Vidal, Neus;Lopez-villegas, Jose Maria;Roca, E.;Fernandez-Fernandez, Francisco V.:
Extending the frequency range of quasi-static electromagnetic solvers. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Extending the frequency range of quasi-static electromagnetic solvers. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Lourenço, Nuno;Martins, Ricardo;Canelas, Antonio;Povoa, Ricardo;Horta, Nuno;Moreira, Fabio ;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Martins, Ricardo;Lourenço, Nuno;Povoa, Ricardo;Canelas, Antonio;Horta, Nuno:
Systematic design of a voltage controlled oscillator using a layout-aware approach. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Systematic design of a voltage controlled oscillator using a layout-aware approach. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Martín, Pablo;Toro-frías, Antonio;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat:
CASE: A reliability simulation tool for analog ICs. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
CASE: A reliability simulation tool for analog ICs. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective. Comunicación en congreso. IEEE Congress on Evolutionary Computation 2017. Donostia - San Sebastián (España), PAÍS VASCO. 2017
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective. Comunicación en congreso. IEEE Congress on Evolutionary Computation 2017. Donostia - San Sebastián (España), PAÍS VASCO. 2017
Diaz-fortuny, Javier;Mateos, Diego;Martin-martinez, Javier;Rodríguez, Rosana;Nafria, Montserrat;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Barajas, Enrique;Aragones, Xavier:
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Giardini Naxos, Italia. 2017
Martín, Pablo;Toro-frías, Antonio;Martin-martinez, Javier;Castro-López, Rafael;Roca, E.;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. Poster en Congreso. 2017 IEEE International Symposium on Circuits and Systems (ISCAS). Baltimore, MD, USA. 2017
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. Poster en Congreso. 2017 IEEE International Symposium on Circuits and Systems (ISCAS). Baltimore, MD, USA. 2017
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Sieiro, Javier;Lopez-villegas, Jose Maria:
A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies. Comunicación en congreso. 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Appl. Pabellón de México, - Universidad de Sevilla, Sevilla (España). 2017
A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies. Comunicación en congreso. 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Appl. Pabellón de México, - Universidad de Sevilla, Sevilla (España). 2017
Couso, Carlos;Mateo, Diego;Aragones, Xavier;Diaz-fortuny, Javier;Porti, Marc;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.;Roca, E.;Castro-López, Rafael;Barajas, Enrique:
Dependence of MOSFETs threshold voltage variability on channel dimensions. Comunicación en congreso. Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Atenas (Grecia). 2017
Dependence of MOSFETs threshold voltage variability on channel dimensions. Comunicación en congreso. Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Atenas (Grecia). 2017
Berkol, Gonenc;Afacan, Engin;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
A Hierarchical Design Automation Concept for Analog Circuits. Comunicación en congreso. IEEE International Conference on Electronics, Circuits, and Systems. MONTE CARLO (MÓNACO). 2016
A Hierarchical Design Automation Concept for Analog Circuits. Comunicación en congreso. IEEE International Conference on Electronics, Circuits, and Systems. MONTE CARLO (MÓNACO). 2016
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Ye, Y.;Spina, Domenico;Dhaene, Tom:
Frequency-Dependent Parameterized Macromodeling of Integrated Inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. LISBOA (PORTUGAL).. 2016
Frequency-Dependent Parameterized Macromodeling of Integrated Inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. LISBOA (PORTUGAL).. 2016
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Lisboa (Portugal). 2016
SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Lisboa (Portugal). 2016
Lopez-arredondo, Jesus;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.:
Optimization of LDO voltage regulators by NSGA-II. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. LISBOA (PORTUGAL).. 2016
Optimization of LDO voltage regulators by NSGA-II. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. LISBOA (PORTUGAL).. 2016
Moreira, Fabio ;Gonzalez-Echevarria, Reinier;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition. Dresden (Germany).. 2016
Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition. Dresden (Germany).. 2016
Moreira, Fabio ;Gonzalez-Echevarria, Reinier;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Surrogate modeling and optimization of inductor performances using Kriging functions. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Surrogate modeling and optimization of inductor performances using Kriging functions. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Roca, E.;Castro-López, Rafael;Velasco-Jiménez, Manuel;Fernandez-Fernandez, Francisco V.:
Transformation conditions of performance fronts of operational amplifiers. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Transformation conditions of performance fronts of operational amplifiers. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Toro-frías, Antonio;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat:
A fast and accurate reliability simulation method for analog circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
A fast and accurate reliability simulation method for analog circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Pak, Murat;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan:
Integration of QMC Based Yield-Aware Pareto Front Techniques on MOEA/D for Robust Analog Synthesis. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Integration of QMC Based Yield-Aware Pareto Front Techniques on MOEA/D for Robust Analog Synthesis. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015
Berkol, Gonenc;Unutulmaz, Ahmet;Afacan, Engin;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.;Pusane, Ali E.;Baskaya, Faik:
A two-step layout-in-the-loop design automation tool. Comunicación en congreso. New Circuits and Systems Conference (NEWCAS), 2015 IEEE 13th International. Grenoble, France. 2015
A two-step layout-in-the-loop design automation tool. Comunicación en congreso. New Circuits and Systems Conference (NEWCAS), 2015 IEEE 13th International. Grenoble, France. 2015
Velasco-Jiménez, Manuel;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Design Space Exploration Using Hierarchical Composition of Performance Models. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015
Design Space Exploration Using Hierarchical Composition of Performance Models. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015
Moreira, Fabio ;Kotti, Mouna;Gonzalez-Echevarria, Reinier;Fino, Maria Helena;Fakhfakh, Mourad;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Physical vs. Surrogate Models of Passive RF Devices. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015
Physical vs. Surrogate Models of Passive RF Devices. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015
Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Aplicación de algoritmos evolutivos multiobjectivo al diseño de circuitos integrados: criterios de detención. Comunicación en congreso. X Congreso Español de Metaheurísticas, Algoritmos Evolutivos y Bioinspirados. MERIDA, ALMENDRALEJO. 2015
Aplicación de algoritmos evolutivos multiobjectivo al diseño de circuitos integrados: criterios de detención. Comunicación en congreso. X Congreso Español de Metaheurísticas, Algoritmos Evolutivos y Bioinspirados. MERIDA, ALMENDRALEJO. 2015
Velasco-Jiménez, Manuel;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Hierarchical Composition of Pareto-Optimal Fronts of Analog Circuits: Implementation Issues. Comunicación en congreso. Design of Circuits and Integrated Systems Conference . - MADRID. 2014
Hierarchical Composition of Pareto-Optimal Fronts of Analog Circuits: Implementation Issues. Comunicación en congreso. Design of Circuits and Integrated Systems Conference . - MADRID. 2014
Martin-martinez, Javier;Diaz, Javier;Rodriguez, Rosana;Nafria, Montserrat;Aymerich, Xavier;Roca, E.;Fernandez-Fernandez, Francisco V.;Rubio, Antonio:
Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers. Comunicación en congreso. 5th European Workshop on CMOS Variability . Palma de Mallorca, España. 2014
Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers. Comunicación en congreso. 5th European Workshop on CMOS Variability . Palma de Mallorca, España. 2014
Afacan, Engin;Ay, Simge;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan;Baskaya, Faik:
Model based hierarchical optimization strategies for analog design automation. Comunicación en congreso. Design, Automation and Test in Europe. Dresden, Alemania. 2014
Model based hierarchical optimization strategies for analog design automation. Comunicación en congreso. Design, Automation and Test in Europe. Dresden, Alemania. 2014
Velasco-Jiménez, Manuel;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Implementation Issues in the Hierarchical Composition of Performance Models of Analog Circuits. Comunicación en congreso. Design, Automation and Test in Europe. Dresden, Alemania. 2014
Implementation Issues in the Hierarchical Composition of Performance Models of Analog Circuits. Comunicación en congreso. Design, Automation and Test in Europe. Dresden, Alemania. 2014
Fernandez-Fernandez, Francisco V.:
Paving the way for new sizing approaches of analog and RF circuits. Conferencia Congreso no publicada. IEEE/ACM Int. Conference on Computer Aided Design. Int. Workshop on. SAN JOSE - CALFORINIA (USA). 2013
Paving the way for new sizing approaches of analog and RF circuits. Conferencia Congreso no publicada. IEEE/ACM Int. Conference on Computer Aided Design. Int. Workshop on. SAN JOSE - CALFORINIA (USA). 2013
Passos, Fábio;Fino, Maria Helena;Roca, E.;Gonzalez-Echevarria, Reinier;Fernandez-Fernandez, Francisco V.:
A Wideband Lumped-Element Model for Integrated Spiral Inductors. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. Donostia - San Sebastián (España). 2013
A Wideband Lumped-Element Model for Integrated Spiral Inductors. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. Donostia - San Sebastián (España). 2013
Passos, Fábio;Fino, Maria Helena;Roca, E.;Gonzalez-Echevarria, Reinier;Fernandez-Fernandez, Francisco V.:
Lumped Element Model for Arbitrarily Shaped Integrated Inductors - A Statistical Analysis. Comunicación en congreso. International IEEE Conference on Microwaves, Communications, Antennas and Electronic Systems. Tel Aviv (Israel). 2013
Lumped Element Model for Arbitrarily Shaped Integrated Inductors - A Statistical Analysis. Comunicación en congreso. International IEEE Conference on Microwaves, Communications, Antennas and Electronic Systems. Tel Aviv (Israel). 2013
Unutulmaz, Ahmet;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
Area optimization on fixed analog floorplans using convex area functions. Comunicación en congreso. Design Automation and Test in Europe Conf.. . 2013
Area optimization on fixed analog floorplans using convex area functions. Comunicación en congreso. Design Automation and Test in Europe Conf.. . 2013
Fernandez-Fernandez, Francisco V.;Roca-Moreno, Elisenda;Castro-López, Rafael:
New approaches to bridge the design gap of analog and RF circuits. Comunicación en congreso. International Conf. on Analog VLSI Circuits. Valencia, Spain. 2012
New approaches to bridge the design gap of analog and RF circuits. Comunicación en congreso. International Conf. on Analog VLSI Circuits. Valencia, Spain. 2012
Velasco-Jiménez, Manuel;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
Systematic Generation of Performance Models of Reconfigurable Analog Circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. SEVILLE (SPAIN). 2012
Systematic Generation of Performance Models of Reconfigurable Analog Circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. SEVILLE (SPAIN). 2012
Kotti, M;Gonzalez-Echevarria, Reinier;Roca-Moreno, Elisenda;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Fakhfakh, Mourad;Sieiro, Javier;López-villegas, J.m.:
Surrogate models of Pareto-optimal planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. . 2012
Surrogate models of Pareto-optimal planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. . 2012
Gonzalez-Echevarria, Reinier;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Lopez-villegas, J.m.;Sieiro, Javier:
A fully automated design flow for planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. SEVILLE (SPAIN). 2012
A fully automated design flow for planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. SEVILLE (SPAIN). 2012
Toro-frías, Antonio;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
An Automated Layout-Aware Design Flow. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . SEVILLE (SPAIN). 2012
An Automated Layout-Aware Design Flow. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . SEVILLE (SPAIN). 2012
Unutulmaz, Ahmet;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
LDS based tools to ease template construction. Comunicación en congreso. Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Sevilla, Spain. 2012
LDS based tools to ease template construction. Comunicación en congreso. Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Sevilla, Spain. 2012
Liu, Bo;Zhang, Qingfu;Fernandez-Fernandez, Francisco V.;Gielen, Georges:
Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algor. Comunicación en congreso. IEEE Congress on Evolutionary Computation. Brisbane (Australia). 2012
Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algor. Comunicación en congreso. IEEE Congress on Evolutionary Computation. Brisbane (Australia). 2012
Unutulmaz, Ahmet;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
LDS ¿ A description script for layout templates. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
LDS ¿ A description script for layout templates. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
Unutulmaz, Ahmet;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
A template router. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
A template router. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
Toro-frías, Antonio;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
LAYOUT-AWARE PARETO FRONTS OF ELECTRONIC CIRCUITS. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
LAYOUT-AWARE PARETO FRONTS OF ELECTRONIC CIRCUITS. Comunicación en congreso. European Conference on Circuit Theory and Design. . 2011
Fernandez-Fernandez, Francisco V.;Esteban-Muller,Juan;Roca-Moreno, Elisenda;Castro-López, Rafael:
STOPPING CRITERIA IN EVOLUTIONARY ALGORITHMS FOR MULTI-OBJECTIVE PERFORMANCE OPTIMIZATION OF INTEGRATED INDUCTORS. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON EVOLUTIONARY COMPUTATION (CEC2010). . 2010
STOPPING CRITERIA IN EVOLUTIONARY ALGORITHMS FOR MULTI-OBJECTIVE PERFORMANCE OPTIMIZATION OF INTEGRATED INDUCTORS. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON EVOLUTIONARY COMPUTATION (CEC2010). . 2010
Liu-,Bo;Fernandez-Fernandez, Francisco V.;Zhang-,Qingfu;Pak-,Murat;Sipahi-,Suha;Gielen-,G.:
AN ENHANCED MOEA/D-DE AND ITS APPLICATION TO MULTIOBJECTIVE ANALOG CELL SIZING. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON EVOLUTIONARY COMPUTATION (CEC2010). . 2010
AN ENHANCED MOEA/D-DE AND ITS APPLICATION TO MULTIOBJECTIVE ANALOG CELL SIZING. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON EVOLUTIONARY COMPUTATION (CEC2010). . 2010
Roca-Moreno, Elisenda;Velasco-Jiménez, Manuel;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
CONTEXT-INDEPENDENT PERFORMANCE MODELING OF OPERATIONAL AMPLIFIERS USING PARETO FRONTS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
CONTEXT-INDEPENDENT PERFORMANCE MODELING OF OPERATIONAL AMPLIFIERS USING PARETO FRONTS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
Sanchez-Lopez, Carlos;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Gonzalez-Echevarria, Reinier;Esteban-Muller,Juan;López-Villegas-,J.M.;Sieiro-Cordoba,Javier;Vidal-Martinez,Neus:
A BOTTOM-UP APPROACH TO THE SYSTEMATIC DESIGN OF LNAS USING EVOLUTIONARY OPTIMIZATION. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
A BOTTOM-UP APPROACH TO THE SYSTEMATIC DESIGN OF LNAS USING EVOLUTIONARY OPTIMIZATION. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
Esteban-Muller,Juan;Gonzalez-Echevarria, Reinier;Sanchez-Lopez, Carlos;Roca-Moreno, Elisenda;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;López-Villegas-,J.M.;Sieiro-Cordoba,Javier;Vidal-Martinez,Neus:
MULTI-OBJECTIVE PERFORMANCE OPTIMIZATION OF PLANAR INDUCTORS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
MULTI-OBJECTIVE PERFORMANCE OPTIMIZATION OF PLANAR INDUCTORS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN (11) (11.2010.GAMMARTH, TUNISIA). GAMMARTH, TUNISIA. 2010
Roca-Moreno, Elisenda;Velasco-Jiménez, Manuel;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
LOAD-INDEPENDENT CHARACTERIZATION OF TRADE-OFF FRONTS FOR OPERATIONAL AMPLIFIERS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE () (.2010.LANZAROTE, ESPAÑA). LANZAROTE, ESPAÑA. 2010
LOAD-INDEPENDENT CHARACTERIZATION OF TRADE-OFF FRONTS FOR OPERATIONAL AMPLIFIERS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE () (.2010.LANZAROTE, ESPAÑA). LANZAROTE, ESPAÑA. 2010
Liu-,Bo;Fernandez-Fernandez, Francisco V.;Gielen-,G.:
AN ACCURATE AND EFFICIENT YIELD OPTIMIZATION METHOD FOR ANALOG CIRCUITS BASED ON COMPUTING BUDGET ALLOCATION AND MEMETIC SEARCH TECHNIQUE. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE) () (.2010.DRESDEN, ALEMANIA). DRESDEN, ALEMANIA. 2010
AN ACCURATE AND EFFICIENT YIELD OPTIMIZATION METHOD FOR ANALOG CIRCUITS BASED ON COMPUTING BUDGET ALLOCATION AND MEMETIC SEARCH TECHNIQUE. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE) () (.2010.DRESDEN, ALEMANIA). DRESDEN, ALEMANIA. 2010
Velasco-Jiménez, Manuel;Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
A PARETO-BASED SYSTEMATIC DESIGN TECHNIQUE FOR RECONFIGURABLE ANALOG CIRCUITS USING AN EVOLUTIONARY OPTIMIZATION ALGORITHM. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE () (.2010.LANZAROTE, ESPAÑA). LANZAROTE, ESPAÑA. 2010
A PARETO-BASED SYSTEMATIC DESIGN TECHNIQUE FOR RECONFIGURABLE ANALOG CIRCUITS USING AN EVOLUTIONARY OPTIMIZATION ALGORITHM. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE () (.2010.LANZAROTE, ESPAÑA). LANZAROTE, ESPAÑA. 2010
Roca-Moreno, Elisenda;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
HIERARCHICAL SYNTHESIS BASED ON PARETO-OPTIMAL FRONTS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN () (.2009.ANTALIA, TURQUÍA). ANTALIA, TURQUÍA. 2009
HIERARCHICAL SYNTHESIS BASED ON PARETO-OPTIMAL FRONTS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN () (.2009.ANTALIA, TURQUÍA). ANTALIA, TURQUÍA. 2009
Liu-,Bo;Fernandez-Fernandez, Francisco V.;De Jonghe-,Dimitri;Gielen-,G.:
LESS EXPENSIVE AND HIGH QUALITY STOPPING CRITERIA FOR MC-BASED ANALOG IC YIELD OPTIMIZATION. Comunicación en congreso. 2009 IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS CIRCUITS AND SYSTEMS (16) (16.2009.YASMINE HAMMAMET, TUNISIA). YASMINE HAMMAMET, TUNISIA. 2009
LESS EXPENSIVE AND HIGH QUALITY STOPPING CRITERIA FOR MC-BASED ANALOG IC YIELD OPTIMIZATION. Comunicación en congreso. 2009 IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS CIRCUITS AND SYSTEMS (16) (16.2009.YASMINE HAMMAMET, TUNISIA). YASMINE HAMMAMET, TUNISIA. 2009
Liu, Bo;Gielen, Georges;Fernandez-Fernandez, Francisco V.:
Fuzzy Selection Based Differential Evolution Algorithm for Analog Cell Sizing Capturing Imprecise Human Intentions. Comunicación en congreso. IEEE Congress on Evolutionary Computation. . 2009
Fuzzy Selection Based Differential Evolution Algorithm for Analog Cell Sizing Capturing Imprecise Human Intentions. Comunicación en congreso. IEEE Congress on Evolutionary Computation. . 2009
Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
USING PARETO-OPTIMAL FRONTS IN THE DESIGN OF RECONFIGURABLE DATA CONVERTERS. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ADVANCES IN CIRCUITS, ELECTRONICS AND MICROELECTRONICS () (.2009.SLIEMA, MALTA). SLIEMA, MALTA. 2009
USING PARETO-OPTIMAL FRONTS IN THE DESIGN OF RECONFIGURABLE DATA CONVERTERS. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ADVANCES IN CIRCUITS, ELECTRONICS AND MICROELECTRONICS () (.2009.SLIEMA, MALTA). SLIEMA, MALTA. 2009
Graeb, Helmut;Balasa, Florin;Castro-López, Rafael;Chang, Yao-wen;Fernandez-Fernandez, Francisco V.;Lin, Po-hung;Strasser, Martin:
Analog Layout Synthesis ¿ Recent advances in topological approaches. Comunicación en congreso. Design Automation and Test in Europe Conf . . 2009
Analog Layout Synthesis ¿ Recent advances in topological approaches. Comunicación en congreso. Design Automation and Test in Europe Conf . . 2009
Liu-,Bo;Fernandez-Fernandez, Francisco V.;Gao-,Peng;Gielen-,G.:
A FUZZY SELECTION BASED CONSTRAINT HANDLING METHOD FOR MULTI-OBJECTIVE OPTIMIZATION OF ANALOG CELLS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN () (.2009.ANTALIA, TURQUÍA). ANTALIA, TURQUÍA. 2009
A FUZZY SELECTION BASED CONSTRAINT HANDLING METHOD FOR MULTI-OBJECTIVE OPTIMIZATION OF ANALOG CELLS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN () (.2009.ANTALIA, TURQUÍA). ANTALIA, TURQUÍA. 2009
Roca-Moreno, Elisenda;Fakhfakh-,Mourad;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
APPLICATIONS OF EVOLUTIONARY COMPUTATION TECHNIQUES TO ANALOG, MIXED-SIGNAL AND RF CIRCUIT DESIGN ¿ AN OVERVIEW. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ELECTRONICS CIRCUITS AND SYSTEMS (ICECS) () (.2009.YASMINE HAMMAMET, TÚNEZ). YASMINE HAMMAMET, TÚNEZ. 2009
APPLICATIONS OF EVOLUTIONARY COMPUTATION TECHNIQUES TO ANALOG, MIXED-SIGNAL AND RF CIRCUIT DESIGN ¿ AN OVERVIEW. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ELECTRONICS CIRCUITS AND SYSTEMS (ICECS) () (.2009.YASMINE HAMMAMET, TÚNEZ). YASMINE HAMMAMET, TÚNEZ. 2009
Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
HIERARCHICAL DESIGN OF RECONFIGURABLE ANALOG CIRCUITS USING MULTI-MODE PARETO FRONTS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
HIERARCHICAL DESIGN OF RECONFIGURABLE ANALOG CIRCUITS USING MULTI-MODE PARETO FRONTS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
Liu-,Bo;Fernandez-Fernandez, Francisco V.;Gielen-,G.;Castro-López, Rafael;Roca-Moreno, Elisenda;Luo-,J.:
MSOEA: A NEW METHODOLOGY FOR SYNTHESIS OF HIGH PERFORMANCE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
MSOEA: A NEW METHODOLOGY FOR SYNTHESIS OF HIGH PERFORMANCE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
Fernandez-Fernandez, Francisco V.;Liu-,Bo;Castro-López, Rafael;Roca-Moreno, Elisenda:
QUALITY METRICS OF PARETO-OPTIMAL FRONTS FOR MULTI-OBJECTIVE SYNTHESIS OF ANALOG ICS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
QUALITY METRICS OF PARETO-OPTIMAL FRONTS FOR MULTI-OBJECTIVE SYNTHESIS OF ANALOG ICS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC AND NUMERICAL METHODS, MODELING AND APPLICATIONS TO CIRCUIT DESIGN () (.2008.ERFURST, ALEMANIA). ERFURST, ALEMANIA. 2008
Tortosa-,R.;Castro-López, Rafael;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
A DESIGN TOOL FOR HIGH-RESOLUTION HIGH-FREQUENCY CASCADE CONTINUOUS-TIME SIGMA DELTA MODULATORS. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Millenium. MASPALOMAS, GRAN CANARIA, SPAIN. 2007
A DESIGN TOOL FOR HIGH-RESOLUTION HIGH-FREQUENCY CASCADE CONTINUOUS-TIME SIGMA DELTA MODULATORS. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Millenium. MASPALOMAS, GRAN CANARIA, SPAIN. 2007
Tortosa-Navas, Ramon;Aceituno, Antonio;Rosa-Utrera, Jose Manuel De La;Rodriguez, Angel;Fernandez-Fernandez, Francisco V.:
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. . 2007
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. . 2007
Rivas-Bastante, Vicente Javier;Morgado-García De Polavieja, Alonso;Castro-López, Rafael;Roca-Moreno, Elisenda;Rio-Fernandez, Rocio Del;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.:
TOWARDS SYSTEMATIC DESIGN OF MULTISTANDARD CONVERTERS. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Millenium. COSTA MELONERAS, GRAN CANARIA, ESPAÑA. 2007
TOWARDS SYSTEMATIC DESIGN OF MULTISTANDARD CONVERTERS. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Millenium. COSTA MELONERAS, GRAN CANARIA, ESPAÑA. 2007
Tortosa-Navas, Ramon;Aceituno-Marchena, Antonio;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
DESIGN OF A 1.2-V 130NM CMOS 13-BIT@40MS/SCASCADE 2-2-1 CONTINUOUS-TIME ÓÄ MODULATOR. Comunicación en congreso. IFIP INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION () (.2006.NICE (FRANCIA)). NICE (FRANCIA). 2006
DESIGN OF A 1.2-V 130NM CMOS 13-BIT@40MS/SCASCADE 2-2-1 CONTINUOUS-TIME ÓÄ MODULATOR. Comunicación en congreso. IFIP INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION () (.2006.NICE (FRANCIA)). NICE (FRANCIA). 2006
Morgado-García De Polavieja, Alonso;Rio-Fernandez, Rocio Del;Rosa-Utrera, Jose Manuel De La;Medeiro-Hidalgo, Fernando Manuel;Perez-Verdu, Maria Belen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
RECONFIGURATION OF CASCADE SD MODULATORS FOR MULTISTANDARD GSM/BLUEETOOTH/UMTS/WLAN TRANSCEIVERS. Comunicación en congreso. ISCAS 2006 () (.2006.KOS, GRECIA). KOS, GRECIA. 2006
RECONFIGURATION OF CASCADE SD MODULATORS FOR MULTISTANDARD GSM/BLUEETOOTH/UMTS/WLAN TRANSCEIVERS. Comunicación en congreso. ISCAS 2006 () (.2006.KOS, GRECIA). KOS, GRECIA. 2006
Rivas-Bastante, Vicente Javier;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
TOWARDS SYSTEMATIC DESIGN OF MULTI-STANDARD RF TRANSCEIVERS. Comunicación en congreso. IFIP INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION () (.2006.NICE (FRANCIA)). NICE (FRANCIA). 2006
TOWARDS SYSTEMATIC DESIGN OF MULTI-STANDARD RF TRANSCEIVERS. Comunicación en congreso. IFIP INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION () (.2006.NICE (FRANCIA)). NICE (FRANCIA). 2006
Tortosa-Navas, Ramon;Aceituno-Marchena, Antonio;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
DESIGN OF A 1.2-V 130NM CMOS 12-BIT@20MHZ GM-C CASCADE 3-2 CONTINUOUS-TIME SIGMA-DELTA MODULATOR. Comunicación en congreso. DCIS 2006 () (.2006.BARCELONA (SPAIN)). BARCELONA (SPAIN). 2006
DESIGN OF A 1.2-V 130NM CMOS 12-BIT@20MHZ GM-C CASCADE 3-2 CONTINUOUS-TIME SIGMA-DELTA MODULATOR. Comunicación en congreso. DCIS 2006 () (.2006.BARCELONA (SPAIN)). BARCELONA (SPAIN). 2006
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
DESIGN OF A 1.2-V CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATOR FOR BROADBAND TELECOMMUNICATIONS. Comunicación en congreso. ISCAS 2006 () (.2006.KOS, GRECIA). KOS, GRECIA. 2006
DESIGN OF A 1.2-V CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATOR FOR BROADBAND TELECOMMUNICATIONS. Comunicación en congreso. ISCAS 2006 () (.2006.KOS, GRECIA). KOS, GRECIA. 2006
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
EFFECT OF CLOCK JITTER ERROR ON THE PERFORMANCE DEGRADATION OF MULTI-BIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NRZ DAC. Comunicación en congreso. CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS DCIS 2005 (20.2005.LISBOA). LISBOA. 2005
EFFECT OF CLOCK JITTER ERROR ON THE PERFORMANCE DEGRADATION OF MULTI-BIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NRZ DAC. Comunicación en congreso. CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS DCIS 2005 (20.2005.LISBOA). LISBOA. 2005
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
GEOMETRICALLY CONSTRAINED PARASITIC-AWARE SYNTHESIS OF ANALOG ICS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
GEOMETRICALLY CONSTRAINED PARASITIC-AWARE SYNTHESIS OF ANALOG ICS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH REDUCED NUMBER OF ANALOG COMPONENTS - APPLICATIONS TO VDSL. Comunicación en congreso. ADDA 2005 INTERNATIONAL CONFERENCE ON ADVANCED A/D AND D/A CONVERSION TECHNIQUES AND THEIR APPLICATIONS (5.2005.LIMERICK, IRELAND). LIMERICK, IRELAND. 2005
CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH REDUCED NUMBER OF ANALOG COMPONENTS - APPLICATIONS TO VDSL. Comunicación en congreso. ADDA 2005 INTERNATIONAL CONFERENCE ON ADVANCED A/D AND D/A CONVERSION TECHNIQUES AND THEIR APPLICATIONS (5.2005.LIMERICK, IRELAND). LIMERICK, IRELAND. 2005
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A REUSE-BASED FRAMEWORK FOR THE DESIGN OF ANALOG AND MIXED-SIGNAL ICS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
A REUSE-BASED FRAMEWORK FOR THE DESIGN OF ANALOG AND MIXED-SIGNAL ICS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
A DIRECT SYNTHESIS METHOD OF CASCADED CONTINUOUS-TIME SIGMA-DELTA MODULATORS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS: ISCAS 2005 (.2005.KOBE, JAPÓN). KOBE, JAPÓN. 2005
A DIRECT SYNTHESIS METHOD OF CASCADED CONTINUOUS-TIME SIGMA-DELTA MODULATORS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS: ISCAS 2005 (.2005.KOBE, JAPÓN). KOBE, JAPÓN. 2005
Morgado-García De Polavieja, Alonso;Rosa-Utrera, Jose Manuel De La;Rio-Fernandez, Rocio Del;Medeiro-Hidalgo, Fernando Manuel;Perez-Verdu, Maria Belen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
AN APPROACH TO THE DESIGN OF MULTISTANDARD SIGMA/DELTA MODULATORS. Comunicación en congreso. WSEAS INTERNATIONAL CONFERENCE ON ELECTRONICS, CONTROL AND SIGNAL PROCESSING (4) (4.2005.MIAMI, FLORIDA). MIAMI, FLORIDA. 2005
AN APPROACH TO THE DESIGN OF MULTISTANDARD SIGMA/DELTA MODULATORS. Comunicación en congreso. WSEAS INTERNATIONAL CONFERENCE ON ELECTRONICS, CONTROL AND SIGNAL PROCESSING (4) (4.2005.MIAMI, FLORIDA). MIAMI, FLORIDA. 2005
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
ON THE SUITABILITY AND DEVELOPMENT OF LAYOUT TEMPLATES FOR ANALOG LAYOUT REUSE AND LAYOUT-AWARE SYNTHESIS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
ON THE SUITABILITY AND DEVELOPMENT OF LAYOUT TEMPLATES FOR ANALOG LAYOUT REUSE AND LAYOUT-AWARE SYNTHESIS. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
ANALYSIS OF CLOCK JITTER ERROR IN MULTIBIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NRZ FEEDBACK WAVEFORM. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS: ISCAS 2005 (.2005.KOBE, JAPÓN). KOBE, JAPÓN. 2005
ANALYSIS OF CLOCK JITTER ERROR IN MULTIBIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NRZ FEEDBACK WAVEFORM. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS: ISCAS 2005 (.2005.KOBE, JAPÓN). KOBE, JAPÓN. 2005
Morgado-García De Polavieja, Alonso;Rio-Fernandez, Rocio Del;Rosa-Utrera, Jose Manuel De La;Medeiro-Hidalgo, Fernando Manuel;Perez-Verdu, Maria Belen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
DESIGN CONSIDERATIONS FOR MULTISTANDARD CASCADE SIGMA-DELTA MODULATORS. Comunicación en congreso. CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS DCIS 2005 (20.2005.LISBOA). LISBOA. 2005
DESIGN CONSIDERATIONS FOR MULTISTANDARD CASCADE SIGMA-DELTA MODULATORS. Comunicación en congreso. CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS DCIS 2005 (20.2005.LISBOA). LISBOA. 2005
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
CONTINUOUS-TIME CASCADED SIGMA-DELTA MODULATORS FOR VDSL: A COMPARATIVE STUDY. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
CONTINUOUS-TIME CASCADED SIGMA-DELTA MODULATORS FOR VDSL: A COMPARATIVE STUDY. Comunicación en congreso. CONFERENCE ON VLSI CIRCUITS AND SYSTEMS II (.2005.SEVILLA, ESPAÑA). Santander (ESPAÑA). 2005
Ruiz-Amaya, Jesus;Rosa-Utrera, Jose Manuel De La;Medeiro-Hidalgo, Fernando Manuel;Fernandez-Fernandez, Francisco V.;Rio-Fernandez, Rocio Del;Perez-Verdu, Maria Belen;Rodriguez-Vazquez, Angel:
AN OPTIMIZATION-BASED TOOL FOR THE HIGH-LEVEL SYNTHESIS OF DISCRETE-TIME AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS IN THE MATLAB/SIMULINK ENVIROMENT. Comunicación en congreso. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS () (.2004.VANCOUVER, CANADA). VANCOUVER, CANADA. 2004
AN OPTIMIZATION-BASED TOOL FOR THE HIGH-LEVEL SYNTHESIS OF DISCRETE-TIME AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS IN THE MATLAB/SIMULINK ENVIROMENT. Comunicación en congreso. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS () (.2004.VANCOUVER, CANADA). VANCOUVER, CANADA. 2004
Ruiz-Amaya, Jesus;Rosa-Utrera, Jose Manuel De La;Medeiro-Hidalgo, Fernando Manuel;Fernandez-Fernandez, Francisco V.;Rio-Fernandez, Rocio Del;Perez-Verdu, Maria Belen;Rodriguez-Vazquez, Angel:
MATLAB/SIMULINK-BASED HIGH-LEVEL SYNTHESIS OF DISCRETE-TIME AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE (DATE'04) () (.2004.PARÍS, FRANCIA). PARÍS, FRANCIA. 2004
MATLAB/SIMULINK-BASED HIGH-LEVEL SYNTHESIS OF DISCRETE-TIME AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE (DATE'04) () (.2004.PARÍS, FRANCIA). PARÍS, FRANCIA. 2004
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
A NEW METHOD FOR THE HIGH-LEVEL SYNTHESIS OF CONTINUOUS-TIME CASCADED SIGMA-DELTA MODULATORS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (19.2004.BORDEAUX, FRANCIA). BORDEAUX, FRANCIA. 2004
A NEW METHOD FOR THE HIGH-LEVEL SYNTHESIS OF CONTINUOUS-TIME CASCADED SIGMA-DELTA MODULATORS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (19.2004.BORDEAUX, FRANCIA). BORDEAUX, FRANCIA. 2004
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
BEHAVIOURAL MODELLING AND SIMULATION OF S. MODULATORS USING HARDWARE DESCRIPTION LANGUAGES. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (.2003.MESSE, MUNICH, ALEMANIA). MESSE, MUNICH, ALEMANIA. 2003
BEHAVIOURAL MODELLING AND SIMULATION OF S. MODULATORS USING HARDWARE DESCRIPTION LANGUAGES. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (.2003.MESSE, MUNICH, ALEMANIA). MESSE, MUNICH, ALEMANIA. 2003
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
ACCURATE VHDL-BASED SIMULATION OF SIGMA-DELTA MODULATORS. Comunicación en congreso. IEEE INSTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (35.2003.BANGKOK, TAILANDIA). BANGKOK, TAILANDIA. 2003
ACCURATE VHDL-BASED SIMULATION OF SIGMA-DELTA MODULATORS. Comunicación en congreso. IEEE INSTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (35.2003.BANGKOK, TAILANDIA). BANGKOK, TAILANDIA. 2003
Castro-López, Rafael;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
OPTIMIZATION-BASED SYNTHESIS OF ANALOGUE CIRCUITS VIA MISMATCH-AWARE SYMBOLIC ANALYSIS. Comunicación en congreso. CONFERENCIA DE DISEÑO DE CIRCUITOS INTEGRADOS Y SISTEMAS (18.2003.CIUDAD REAL ). CIUDAD REAL. 2003
OPTIMIZATION-BASED SYNTHESIS OF ANALOGUE CIRCUITS VIA MISMATCH-AWARE SYMBOLIC ANALYSIS. Comunicación en congreso. CONFERENCIA DE DISEÑO DE CIRCUITOS INTEGRADOS Y SISTEMAS (18.2003.CIUDAD REAL ). CIUDAD REAL. 2003
Castro-López, Rafael;Ruiz-Amaya, Jesus;Romay-,Rafael;Rosa-Utrera, Jose Manuel De La;Rio-Fernandez, Rocio Del;Medeiro-Hidalgo, Fernando Manuel;Fernandez-Fernandez, Francisco V.;Perez-Verdu, Maria Belen;Rodriguez-Vazquez, Angel:
DESCRIPTION LANGUAGES AND TOOLS FOR BEHAVIOURAL SIMULATION OF SIGMA-DELTA MODULATORS: A COMPARATIVE SURVEY. Comunicación en congreso. FORUM ON SPECIFICATION & DESIGN LANGUAGES (FDL 2003) () (.2003.FRANKFURT, ALEMANIA). FRANKFURT, ALEMANIA. 2003
DESCRIPTION LANGUAGES AND TOOLS FOR BEHAVIOURAL SIMULATION OF SIGMA-DELTA MODULATORS: A COMPARATIVE SURVEY. Comunicación en congreso. FORUM ON SPECIFICATION & DESIGN LANGUAGES (FDL 2003) () (.2003.FRANKFURT, ALEMANIA). FRANKFURT, ALEMANIA. 2003
Castro-López, Rafael;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
SYNTHESIS OF A WIRELESS COMMUNICATION ANALOG BACKEND USING A SYMBOLIC ANALYZER. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (.2002.SINAIA, RUMANIA). SINAIA, RUMANIA. 2002
SYNTHESIS OF A WIRELESS COMMUNICATION ANALOG BACKEND USING A SYMBOLIC ANALYZER. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (.2002.SINAIA, RUMANIA). SINAIA, RUMANIA. 2002
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Delgado-Restituto, Manuel;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
GENERATION OF TECHNOLOGY-PORTABLE FLEXIBLE ANALOG BLOCKS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (.2002.-). -. 2002
GENERATION OF TECHNOLOGY-PORTABLE FLEXIBLE ANALOG BLOCKS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (.2002.-). -. 2002
Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
APPROXIMATE SYMBOLIC ANALYSIS OF MISMATCH CHARACTERISTICS IN ANALOG CIRCUIT. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (.2002.SINAIA, RUMANIA). SINAIA, RUMANIA. 2002
APPROXIMATE SYMBOLIC ANALYSIS OF MISMATCH CHARACTERISTICS IN ANALOG CIRCUIT. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (.2002.SINAIA, RUMANIA). SINAIA, RUMANIA. 2002
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Delgado-Restituto, Manuel;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
LAYOUT-CONSTRAINED RETARGETING OF ANALOG BLOCKS. Comunicación en congreso. PROC. DESIGN CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (15.2001.OPORTO). OPORTO. 2001
LAYOUT-CONSTRAINED RETARGETING OF ANALOG BLOCKS. Comunicación en congreso. PROC. DESIGN CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (15.2001.OPORTO). OPORTO. 2001
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Delgado-Restituto, Manuel;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
CREATING FLEXIBLE ANALOGUE IP BLOCKS. Comunicación en congreso. EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (27.2001.VILLACH, AUSTRIA). VILLACH, AUSTRIA. 2001
CREATING FLEXIBLE ANALOGUE IP BLOCKS. Comunicación en congreso. EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (27.2001.VILLACH, AUSTRIA). VILLACH, AUSTRIA. 2001
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Delgado-Restituto, Manuel;Rodriguez-Vazquez, Angel:
A COMPLETE RETARGETING METHODOLOGY FOR MIXED-SIGNAL IC DESIGNS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (15.2001.HELSINKI). HELSINKI. 2001
A COMPLETE RETARGETING METHODOLOGY FOR MIXED-SIGNAL IC DESIGNS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (15.2001.HELSINKI). HELSINKI. 2001
Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Roca-Moreno, Elisenda;Rodriguez-Vazquez, Angel:
ON THE USE OF HIGH-FREQUENCY MOSFET MODELS IN SYMBOLIC ANALYZERS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (15.2001.HELSINKI). HELSINKI. 2001
ON THE USE OF HIGH-FREQUENCY MOSFET MODELS IN SYMBOLIC ANALYZERS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (15.2001.HELSINKI). HELSINKI. 2001
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Delgado-Restituto, Manuel;Rodriguez-Vazquez, Angel:
RETARGETING OF MIXED-SIGNAL BLOCKS FOR SOCS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE (1.2001.MUNICH). MUNICH. 2001
RETARGETING OF MIXED-SIGNAL BLOCKS FOR SOCS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE (1.2001.MUNICH). MUNICH. 2001
Castro-López, Rafael;Delgado-Restituto, Manuel;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
REUSABILITY METHODOLOGY FOR MIXED-SIGNAL ASIC DESIGN AT LAYOUT AND SCHEMATIC LEVEL. Comunicación en congreso. DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS DCIS 2000 (15.2000.MONTPELLIER, FRANCIA). MONTPELLIER, FRANCIA. 2000
REUSABILITY METHODOLOGY FOR MIXED-SIGNAL ASIC DESIGN AT LAYOUT AND SCHEMATIC LEVEL. Comunicación en congreso. DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS DCIS 2000 (15.2000.MONTPELLIER, FRANCIA). MONTPELLIER, FRANCIA. 2000
Perez-Verdu, Maria Belen;Rio-Fernandez, Rocio Del;Rosa-Utrera, Jose Manuel De La;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
DISEÑO DE CONVERTIDORES A/D DE ALTA RESOLUCIÓN EN TECNOLOGÍAS SUBMICROMÉTRICAS. Comunicación en congreso. SEMINARIO DEL PROGRAMA NACIONAL DE TECNOLOGIAS DE LA INFORMACION Y LAS COMUNICACIONES (TEDEA2000). . 2000
DISEÑO DE CONVERTIDORES A/D DE ALTA RESOLUCIÓN EN TECNOLOGÍAS SUBMICROMÉTRICAS. Comunicación en congreso. SEMINARIO DEL PROGRAMA NACIONAL DE TECNOLOGIAS DE LA INFORMACION Y LAS COMUNICACIONES (TEDEA2000). . 2000
Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
AN ERROR-CONTROLLED METHODOLOGY FOR APPROXIMATED HIERARCHICAL SYMBOLIC ANALYSIS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS. GINEBRA, SUIZA. 2000
AN ERROR-CONTROLLED METHODOLOGY FOR APPROXIMATED HIERARCHICAL SYMBOLIC ANALYSIS. Comunicación en congreso. IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS. GINEBRA, SUIZA. 2000
Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A HIERARCHICAL APPROACH FOR THE SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.2000.PARIS). PARIS. 2000
A HIERARCHICAL APPROACH FOR THE SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.2000.PARIS). PARIS. 2000
Montes-, F.;Medeiro-Hidalgo, Fernando Manuel;Dominguez-Castro, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
XFRIDGE: A SPICE-BASED PORTABLE USER FRIENDLY CELL-LEVEL SIZING TOOL. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.2000.PARIS). PARIS. 2000
XFRIDGE: A SPICE-BASED PORTABLE USER FRIENDLY CELL-LEVEL SIZING TOOL. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.2000.PARIS). PARIS. 2000
Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Roca-Moreno, Elisenda;Rodriguez-Vazquez, Angel:
INCORPORATING CHARGE CONSERVATION MODEL INTO SYMBOLIC ANALYZERS. Comunicación en congreso. SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (1.2000.LISBOA). LISBOA. 2000
INCORPORATING CHARGE CONSERVATION MODEL INTO SYMBOLIC ANALYZERS. Comunicación en congreso. SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (1.2000.LISBOA). LISBOA. 2000
Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A METHODOLOGY FOR VALIDATION OF APPROXIMATED SYMBOLIC MODELS. Comunicación en congreso. SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (1.2000.LISBOA). LISBOA. 2000
A METHODOLOGY FOR VALIDATION OF APPROXIMATED SYMBOLIC MODELS. Comunicación en congreso. SYMBOLIC METHODS AND APPLICATIONS TO CIRCUIT DESIGN (1.2000.LISBOA). LISBOA. 2000
Rodriguez, Juan David;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A SYMBOLIC POLE/ZERO EXTRACTION METHODOLOGY BASED ON ANALYSIS OF CIRCUITS TIME-CONSTANTS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
A SYMBOLIC POLE/ZERO EXTRACTION METHODOLOGY BASED ON ANALYSIS OF CIRCUITS TIME-CONSTANTS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
Guerra-Vinuesa, Oscar;Rodriguez, Juan David;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A NOVEL ERROR-CONTROLLED HIERARCHICAL APPROACH FOR THE SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
A NOVEL ERROR-CONTROLLED HIERARCHICAL APPROACH FOR THE SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
Horta-,N;Vital-,J.;Pereira-,M;Franca-,J.;Castro-López, Rafael;Delgado-Restituto, Manuel;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Santos-,P:
RAPID-RETARGETABILITY FOR REUSABILITY OF APPLICATION-DRIVEN QUADRATURE D/A INTERFACE BLOCK DESIGN. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
RAPID-RETARGETABILITY FOR REUSABILITY OF APPLICATION-DRIVEN QUADRATURE D/A INTERFACE BLOCK DESIGN. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
Pérez-Montes, Francisco Manuel;Medeiro-Hidalgo, Fernando Manuel;Dominguez-Castro, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
XFRIDGE: AN OPEN TOOL FOR SIZING IC CELLS WITH USER-FRIENDLY INTERFACE. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
XFRIDGE: AN OPEN TOOL FOR SIZING IC CELLS WITH USER-FRIENDLY INTERFACE. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE (14.1999.PALMA DE MALLORCA). PALMA DE MALLORCA. 1999
Franca-,J.;Horta-,N;Pereira-,M;Vital-,J.;Castro-López, Rafael;Delgado-Restituto, Manuel;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Ramos, J. ;Santos-,P:
RAPID-RETARGETABILITY FOR REUSABILITY OF APPLICATION-DRIVEN QUADRATURE D/A INTERFACE BLOCK DESIGN. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (6.1999.PAFOS, CHIPRE). PAFOS, CHIPRE. 1999
RAPID-RETARGETABILITY FOR REUSABILITY OF APPLICATION-DRIVEN QUADRATURE D/A INTERFACE BLOCK DESIGN. Comunicación en congreso. IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (6.1999.PAFOS, CHIPRE). PAFOS, CHIPRE. 1999
Guerra-Vinuesa, Oscar;Rodriguez, Juan David;Garcia, Leonardo;Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Rodriguez-Vazquez, Angel:
ON THE VALIDITY REGION OF BEHAVIORAL MODELS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (13.1999.STRESA, ITALIA). STRESA, ITALIA. 1999
ON THE VALIDITY REGION OF BEHAVIORAL MODELS. Comunicación en congreso. EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (13.1999.STRESA, ITALIA). STRESA, ITALIA. 1999
Rodriguez, Juan David;Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A TOOL FOR COMPLETE SMALL-SIGNAL ANALYTICAL MODELING OF LARGE ANALOG CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON DESIGN OF MIXED-MODE INTEGRATED CIRCUITS AND APPLICATIONS (3.1999.PUERTO VALLARTA, MÉXICO). PUERTO VALLARTA, MÉXICO. 1999
A TOOL FOR COMPLETE SMALL-SIGNAL ANALYTICAL MODELING OF LARGE ANALOG CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON DESIGN OF MIXED-MODE INTEGRATED CIRCUITS AND APPLICATIONS (3.1999.PUERTO VALLARTA, MÉXICO). PUERTO VALLARTA, MÉXICO. 1999
Guerra-Vinuesa, Oscar;Rodriguez, Juan David;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
AN ACCURATE ERROR-CONTROLLED MECHANISM FOR SIMPLIFICATION BEFORE GENERATION ALGORITHMS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.1999.MUNICH). MUNICH. 1999
AN ACCURATE ERROR-CONTROLLED MECHANISM FOR SIMPLIFICATION BEFORE GENERATION ALGORITHMS. Comunicación en congreso. DESIGN, AUTOMATION AND TEST IN EUROPE (1.1999.MUNICH). MUNICH. 1999
Guerra-Vinuesa, Oscar;Rodriguez-garcía, J.d.;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A CIRCUIT REDUCTION TECHNIQUE FOR APPROXIMATED SYMBOLIC ANALYSIS OF LARGE ANALOG CIRCUITS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE, DCIS 98 (13.1998.MADRID). . 1998
A CIRCUIT REDUCTION TECHNIQUE FOR APPROXIMATED SYMBOLIC ANALYSIS OF LARGE ANALOG CIRCUITS. Comunicación en congreso. DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS CONFERENCE, DCIS 98 (13.1998.MADRID). . 1998
Guerra-Vinuesa, Oscar;Rodriguez-garcía, J.d.;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
TRUE HIERARCHICAL SYMBOLIC ANALYSIS OF LARGE-SCALE ANALOG CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
TRUE HIERARCHICAL SYMBOLIC ANALYSIS OF LARGE-SCALE ANALOG CIRCUITS. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
Rodriguez-garcía, J.d.;Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A NEW SIMPLIFICATION BEFORE AND DURING GENERATION ALGORITHM. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
A NEW SIMPLIFICATION BEFORE AND DURING GENERATION ALGORITHM. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
Rodriguez, Juan David;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
SYMBOLIC POLE/ZERO EXTRACTION THROUGH DEDICATED SBG/SDG TECHNIQUES. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
SYMBOLIC POLE/ZERO EXTRACTION THROUGH DEDICATED SBG/SDG TECHNIQUES. Comunicación en congreso. INTERNATIONAL WORKSHOP ON SYMBOLIC METHODS AND APPLICATIONS IN CIRCUIT DESIGN (5.1998.KAISERLAUTERN). KAISERLAUTERN. 1998
Guerra-Vinuesa, Oscar;Rodriguez, Juan David;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A SIMPLIFICATION BEFORE AND DURING GENERATION METHODOLOGY FOR SYMBOLIC LARGE-CIRCUIT ANALYSIS. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (1.1998.LISBOA, PORTUGAL). LISBOA, PORTUGAL. 1998
A SIMPLIFICATION BEFORE AND DURING GENERATION METHODOLOGY FOR SYMBOLIC LARGE-CIRCUIT ANALYSIS. Comunicación en congreso. INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (1.1998.LISBOA, PORTUGAL). LISBOA, PORTUGAL. 1998
Fernandez-Fernandez, Francisco V.;Perez-Verdu, Maria Belen;Rodriguez-Vazquez, Angel:
BEHAVIORAL MODELING OF PWL ANALOG CIRCUITS USING SYMBOLIC ANALYSIS. Comunicación en congreso. 1998 IEEE INT. SYMP. CIRCUITS AND SYSTEMS. MONTERREY, CALIFORNIA. 1998
BEHAVIORAL MODELING OF PWL ANALOG CIRCUITS USING SYMBOLIC ANALYSIS. Comunicación en congreso. 1998 IEEE INT. SYMP. CIRCUITS AND SYSTEMS. MONTERREY, CALIFORNIA. 1998
Galan, Mariano;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A New 3-Matroid Intersection Algorithm for Simplification During Generation in Symbolic . Comunicación en congreso. European Conf. on Circuit Theory and Design. BUDAPEST (HUNGARY). 1997
A New 3-Matroid Intersection Algorithm for Simplification During Generation in Symbolic . Comunicación en congreso. European Conf. on Circuit Theory and Design. BUDAPEST (HUNGARY). 1997
Sanchez-karhunen, Eduardo;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Mismatch Distance Term Compensation in Centroid Configurations with Nonzero-Area Devices. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Hong-Kong. 1997
Mismatch Distance Term Compensation in Centroid Configurations with Nonzero-Area Devices. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Hong-Kong. 1997
Galan, Mariano;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Comparison of Matroid Intersection Algorithms for Large Circuit Analysis. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Hong-Kong. 1997
Comparison of Matroid Intersection Algorithms for Large Circuit Analysis. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Hong-Kong. 1997
Garcia-vargas, Ignacio;Galan, Mariano;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
An Algorithm for Numerical Reference Generation in Symbolic Analysis of Large Analog Circuits. Comunicación en congreso. European Design & Test Conference. Paris, France. 1997
An Algorithm for Numerical Reference Generation in Symbolic Analysis of Large Analog Circuits. Comunicación en congreso. European Design & Test Conference. Paris, France. 1997
Galán, Mariano;García-Vargas, Ignacio;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Comparison of matroid intersection algorithms for large circuit analysis. Comunicación en congreso. XI Design of Integrated Circuits and Systems Conf.. BARCELONA, SITGES, ESPAÑA. 1996
Comparison of matroid intersection algorithms for large circuit analysis. Comunicación en congreso. XI Design of Integrated Circuits and Systems Conf.. BARCELONA, SITGES, ESPAÑA. 1996
Sanchez-karhunen, Eduardo;Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Compensación del término de distancia en el desapareamiento de estructuras centroides con motivos no-puntuales. Comunicación en congreso. XI Congresos de Diseño de Circuitos Integrados. . 1996
Compensación del término de distancia en el desapareamiento de estructuras centroides con motivos no-puntuales. Comunicación en congreso. XI Congresos de Diseño de Circuitos Integrados. . 1996
Garcia-vargas, Ignacio;Galán, Mariano;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Numerical reference generation in approximation before and during generation algorithms. Comunicación en congreso. XI Design of Integrated Circuits and Systems Conf.. . 1996
Numerical reference generation in approximation before and during generation algorithms. Comunicación en congreso. XI Design of Integrated Circuits and Systems Conf.. . 1996
Galan, Mariano;Garcia-vargas, Ignacio;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A new matroid intersection algorithm for symbolic large circuit analysis. Comunicación en congreso. 4th Int. Workshop on Symbolic Methods and Applications to Circuit Design. Leuven, Belgium. 1996
A new matroid intersection algorithm for symbolic large circuit analysis. Comunicación en congreso. 4th Int. Workshop on Symbolic Methods and Applications to Circuit Design. Leuven, Belgium. 1996
Garcia-vargas, Ignacio;Galan, Mariano;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Numerical reference generation for symbolic large circuit analysis. Comunicación en congreso. 4th Int. Workshop on Symbolic Methods and Applications to Circuit Design. . 1996
Numerical reference generation for symbolic large circuit analysis. Comunicación en congreso. 4th Int. Workshop on Symbolic Methods and Applications to Circuit Design. . 1996
Wambacq, Piet;Fernandez-Fernandez, Francisco V.;Gielen, Georges;Sansen, Willy;Rodriguez-Vazquez, Angel:
A family of matroid intersection algorithms for the computation of approximated symbolic network functions. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Atlanta, USA. 1996
A family of matroid intersection algorithms for the computation of approximated symbolic network functions. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Atlanta, USA. 1996
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Symbolic Analysis Tools - The State-of-the-art. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Atlanta, USA. 1996
Symbolic Analysis Tools - The State-of-the-art. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. Atlanta, USA. 1996
Rodriguez-Vazquez, Angel;Medeiro, Fernando;Perez-Verdu, Belen;Fernandez-Fernandez, Francisco V.;Huertas, Jose Luis;Dominguez-Castro, Rafael:
Synthesis of SD Modulators. Comunicación en congreso. International Summer Course on Systematic Analog Design. Leuven, Belgium. 1995
Synthesis of SD Modulators. Comunicación en congreso. International Summer Course on Systematic Analog Design. Leuven, Belgium. 1995
Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
A tool for fast mismatch analysis of analog circuits. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. . 1995
A tool for fast mismatch analysis of analog circuits. Comunicación en congreso. IEEE Int. Symp. Circuits and Systems. . 1995
Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Influence of the Layout on the MOS Transistor Electrical Parameters. Comunicación en congreso. IEEE Int. Conf. on Electronics, Circuits and Systems. Cairo (Egipto). 1994
Influence of the Layout on the MOS Transistor Electrical Parameters. Comunicación en congreso. IEEE Int. Conf. on Electronics, Circuits and Systems. Cairo (Egipto). 1994
Rodriguez-Macias, Rafael;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.;Huertas, Jose Luis:
Una Herramienta para la Simulación del Desapareamiento en Circuitos Analógicos. Comunicación en congreso. IX Congreso de Diseño de Circuitos Integrados. Gran Canaria. 1994
Una Herramienta para la Simulación del Desapareamiento en Circuitos Analógicos. Comunicación en congreso. IX Congreso de Diseño de Circuitos Integrados. Gran Canaria. 1994
Fernandez-Fernandez, Francisco V.;Wambacq, Piet;Gielen, Georges;Sansen, Willy;Rodriguez-Vazquez, Angel:
Un Algoritmo para el Análisis Simbólico de Circuitos Integrados Analógicos de Gran Tamaño. Comunicación en congreso. IX Congreso de Diseño de Circuitos Integrados. Gran Canaria. 1994
Un Algoritmo para el Análisis Simbólico de Circuitos Integrados Analógicos de Gran Tamaño. Comunicación en congreso. IX Congreso de Diseño de Circuitos Integrados. Gran Canaria. 1994
Medeiro, Fernando;Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Rodriguez-Vazquez, Angel:
A Statistical Optimization-Based Approach for Automated Sizing of Analog Cells. Comunicación en congreso. IEEE International Conf. on Computer-Aided Design. Santa Clara (USA). 1994
A Statistical Optimization-Based Approach for Automated Sizing of Analog Cells. Comunicación en congreso. IEEE International Conf. on Computer-Aided Design. Santa Clara (USA). 1994
Wambacq, Piet;Fernandez-Fernandez, Francisco V.;Gielen, Georges;Sansen, Willy;Rodriguez-Vazquez, Angel:
Symbolic Network Analysis of Large Analogue Integrated Circuits. Comunicación en congreso. Third Int. Workshop on Symbolic Methods and Applications to Circuit Design. . 1994
Symbolic Network Analysis of Large Analogue Integrated Circuits. Comunicación en congreso. Third Int. Workshop on Symbolic Methods and Applications to Circuit Design. . 1994
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
Approximation Algorithms in Symbolic Circuit Analysis. Comunicación en congreso. IEEE Int. Symposium on Circuits and Systems. Londres (Gran Bretaña). 1994
Approximation Algorithms in Symbolic Circuit Analysis. Comunicación en congreso. IEEE Int. Symposium on Circuits and Systems. Londres (Gran Bretaña). 1994
Fernandez-Fernandez, Francisco V.;Wambacq, Piet;Gielen, Georges;Rodriguez-Vazquez, Angel;Sansen, Willy:
Symbolic analysis of large analog integrated circuits by approximation during expression generation. Comunicación en congreso. IEEE Int. Symposium on Circuits and Systems. Londres (Gran Bretaña). 1994
Symbolic analysis of large analog integrated circuits by approximation during expression generation. Comunicación en congreso. IEEE Int. Symposium on Circuits and Systems. Londres (Gran Bretaña). 1994
Wambacq, Piet;Fernandez-Fernandez, Francisco V.;Gielen, Georges;Sansen, Willy:
Efficient Symbolic Computation of Approximated Small-Signal Characteristics. Comunicación en congreso. IEEE Custom Integrated Circuits Conf.. San Diego (USA). 1994
Efficient Symbolic Computation of Approximated Small-Signal Characteristics. Comunicación en congreso. IEEE Custom Integrated Circuits Conf.. San Diego (USA). 1994
Rochel, Steffen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Teaching Analog Design Concepts with Symbolic Analysis Tools. Comunicación en congreso. EUROCHIP Workshop on VLSI Design Training. . 1993
Teaching Analog Design Concepts with Symbolic Analysis Tools. Comunicación en congreso. EUROCHIP Workshop on VLSI Design Training. . 1993
Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Diseño Automático de Celdas Analógicas mediante Técnicas Basadas en Simulación. Comunicación en congreso. VIII Congreso de Diseño de Circuitos Integrados. Malaga. 1993
Diseño Automático de Celdas Analógicas mediante Técnicas Basadas en Simulación. Comunicación en congreso. VIII Congreso de Diseño de Circuitos Integrados. Malaga. 1993
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martin, Juan Domingo;Huertas, Jose Luis:
Nested Format Symbolic Expression Approximation. Comunicación en congreso. European Conf. on Circuit Theory and Design. . 1993
Nested Format Symbolic Expression Approximation. Comunicación en congreso. European Conf. on Circuit Theory and Design. . 1993
Rodriguez-Macias, Rafael;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.;Huertas, Jose Luis:
A Tool for Optimum Design of Analog Cell with Reduced Variance. Comunicación en congreso. IEEE 36th Midwest Symp. on Circuits and Systems. Detroit (USA). 1993
A Tool for Optimum Design of Analog Cell with Reduced Variance. Comunicación en congreso. IEEE 36th Midwest Symp. on Circuits and Systems. Detroit (USA). 1993
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martin, Juan Domingo;Huertas, Jose Luis:
Técnicas de Simplificación en el Análisis Simbólico de Circuitos Integrados Analógicos. Comunicación en congreso. VII Congreso de Diseño de Circuitos Integrados. . 1992
Técnicas de Simplificación en el Análisis Simbólico de Circuitos Integrados Analógicos. Comunicación en congreso. VII Congreso de Diseño de Circuitos Integrados. . 1992
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martin, Juan Domingo;Huertas, Jose Luis:
Accurate Simplification of Large Symbolic Formulae. Comunicación en congreso. IEEE Int. Conf. on Computer-Aided Design. Santa Clara (USA). 1992
Accurate Simplification of Large Symbolic Formulae. Comunicación en congreso. IEEE Int. Conf. on Computer-Aided Design. Santa Clara (USA). 1992
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martin, Juan Domingo;Huertas, Jose Luis:
Approximating Nested Format Symbolic Expressions. Comunicación en congreso. Second International Workshop on Symbolic Methods and Applications to Circuit Design. Firenze (Italia). 1992
Approximating Nested Format Symbolic Expressions. Comunicación en congreso. Second International Workshop on Symbolic Methods and Applications to Circuit Design. Firenze (Italia). 1992
Fernandez-Fernandez, Francisco V.;Martin, Juan Domingo;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
On Simplification Techniques for Symbolic Analysis of Analog Integrated Circuits. Comunicación en congreso. IEEE Int. Symp. on Circuits and Systems. San Diego (USA). 1992
On Simplification Techniques for Symbolic Analysis of Analog Integrated Circuits. Comunicación en congreso. IEEE Int. Symp. on Circuits and Systems. San Diego (USA). 1992
Perez, Belen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Modelado y Caracterización de BJTs Laterales en Tecnologías CMOS. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Modelado y Caracterización de BJTs Laterales en Tecnologías CMOS. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Modelado Dinámico Comparativo de Espejos de Corriente CMOS. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Modelado Dinámico Comparativo de Espejos de Corriente CMOS. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Caracterización Automática de Circuitos Integrados Analógios vía Análisis Simbólico. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Caracterización Automática de Circuitos Integrados Analógios vía Análisis Simbólico. Comunicación en congreso. VI Congreso de Diseño de Circuitos Integrados. Santander. 1991
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Design and Applications of Symbolic Analysis Tools for Analog Integrated Circuits. Comunicación en congreso. First International Workshop on Symbolic Methods and Applications to Circuit Design. Paris (Francia). 1991
Design and Applications of Symbolic Analysis Tools for Analog Integrated Circuits. Comunicación en congreso. First International Workshop on Symbolic Methods and Applications to Circuit Design. Paris (Francia). 1991
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
A Tool for Symbolic Analysis of Analog Integrated Circuits Including Pole/zero Extraction. Comunicación en congreso. European Conf. on Circuit Theory and Design. Copenhagen (Denmark). 1991
A Tool for Symbolic Analysis of Analog Integrated Circuits Including Pole/zero Extraction. Comunicación en congreso. European Conf. on Circuit Theory and Design. Copenhagen (Denmark). 1991
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
An Advanced Symbolic Analyzer for the Automatic Generation of Analog Circuit Design Equations. Comunicación en congreso. IEEE Int. Symp. on Circuits and Systems. Singapore. 1991
An Advanced Symbolic Analyzer for the Automatic Generation of Analog Circuit Design Equations. Comunicación en congreso. IEEE Int. Symp. on Circuits and Systems. Singapore. 1991
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
Automatic Modeling of Analog Circuits in a Portable Electrical Analysis CAD Framework. Comunicación en congreso. European Solid-State Circuits Conf.. Grenoble (Francia). 1990
Automatic Modeling of Analog Circuits in a Portable Electrical Analysis CAD Framework. Comunicación en congreso. European Solid-State Circuits Conf.. Grenoble (Francia). 1990
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
ASAP: A Portable Program for the Symbolic Analysis of Analog Integrated Circuits. Comunicación en congreso. EURO ASIC 90. Paris (France). 1990
ASAP: A Portable Program for the Symbolic Analysis of Analog Integrated Circuits. Comunicación en congreso. EURO ASIC 90. Paris (France). 1990
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas, Jose Luis:
ASAP: Un Programa Para el Análisis Simbólico de Circuitos Integrados Analógicos. Comunicación en congreso. V Congreso de Diseño de Circuitos Integrados. La Rábida. 1989
ASAP: Un Programa Para el Análisis Simbólico de Circuitos Integrados Analógicos. Comunicación en congreso. V Congreso de Diseño de Circuitos Integrados. La Rábida. 1989
Artículos publicados
Sarazá, Pablo;Carrasco-lopez, Hector;Santana-andreo, Andres;Brox-Jimenez, Piedad;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.:
Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation. Microelectronics Reliability. 2021. Vol: 118. 10.1016/j.microrel.2021.114049.
Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation. Microelectronics Reliability. 2021. Vol: 118. 10.1016/j.microrel.2021.114049.
Canelas, Antonio;F. Passos;Lourenço, Nuno;Martins, Ricardo;Roca, E.;Castro-López, Rafael;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Hierarchical yield-aware synthesis methodology covering device-, circuit-, and system-level for radiofrequency ICs. IEEE Access. 2021. Vol: 9. Pág. 124152-124164. 10.1109/ACCESS.2021.3110758.
Hierarchical yield-aware synthesis methodology covering device-, circuit-, and system-level for radiofrequency ICs. IEEE Access. 2021. Vol: 9. Pág. 124152-124164. 10.1109/ACCESS.2021.3110758.
F. Passos;Roca, E.;Sieiro, Javier;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
An efficient transformer modeling approach for mm-wave circuit design. AE Ue: International Journal of Electronics and Communication. 2021. Vol: 128. 10.1016/j.aeue.2020.153496.
An efficient transformer modeling approach for mm-wave circuit design. AE Ue: International Journal of Electronics and Communication. 2021. Vol: 128. 10.1016/j.aeue.2020.153496.
Pedreira, Gerard;Martin-martinez, Javier;Sarazá, Pablo;Castro-López, Rafael;Rodriguez, Rosana;Roca, E.;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
Unified RTN and BTI statistical compact modeling from a defect-centric perspective. Solid-State Electronics. 2021. Vol: 185. 10.1016/j.sse.2021.108112.
Unified RTN and BTI statistical compact modeling from a defect-centric perspective. Solid-State Electronics. 2021. Vol: 185. 10.1016/j.sse.2021.108112.
Diaz-fortuny, Javier;Sarazá, Pablo;Rodriguez, Rosana;Martin-martinez, Javier;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions. Solid-State Electronics. 2021. Vol: 185. 10.1016/j.sse.2021.108037.
Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions. Solid-State Electronics. 2021. Vol: 185. 10.1016/j.sse.2021.108037.
Sarazá, Pablo;Martin-martinez, Javier;Castro-López, Rafael;Roca, E.;Rodriguez, Rosana;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
Statistical characterization of time-dependent variability defects using the maximum current fluctuation. IEEE Transactions on Electron Devices. 2021. Vol: 68. Núm: 8. Pág. 4039-4044. 10.1109/TED.2021.3086448.
Statistical characterization of time-dependent variability defects using the maximum current fluctuation. IEEE Transactions on Electron Devices. 2021. Vol: 68. Núm: 8. Pág. 4039-4044. 10.1109/TED.2021.3086448.
F. Passos;Roca, E.;Martins, Ricardo;Lourenço, Nuno;Ahyoune, Saiyd;Sieiro, Javier;Castro-López, Rafael;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Ready-to-Fabricate RF Circuit Synthesis using a Layout- and Variability-Aware Optimization-based Methodology. IEEE Access. 2020. Vol: 8. Pág. 51601-51609. 10.1109/ACCESS.2020.2980211 .
Ready-to-Fabricate RF Circuit Synthesis using a Layout- and Variability-Aware Optimization-based Methodology. IEEE Access. 2020. Vol: 8. Pág. 51601-51609. 10.1109/ACCESS.2020.2980211 .
F. Passos;Chanca, Miguel;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Synthesis of mm-Wave Wideband Receivers in 28nm CMOS Technology for Automotive Radar Applications. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2020. 10.1109/TCAD.2020.2983363.
Synthesis of mm-Wave Wideband Receivers in 28nm CMOS Technology for Automotive Radar Applications. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2020. 10.1109/TCAD.2020.2983363.
Sarazá, Pablo;Diaz-fortuny, Javier;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. Integration. 2020. Vol: 72. Pág. 13-20. 10.1016/j.vlsi.2020.02.002.
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. Integration. 2020. Vol: 72. Pág. 13-20. 10.1016/j.vlsi.2020.02.002.
Tlelo-cuautle, Esteban;Diaz-muñoz, Jonathan Daniel;Gonzalez-zapata, Astrid Maritza;Li, Rui;Leon-salas, Walter Daniel;Fernandez-Fernandez, Francisco V.;Guillén-fernandez, Omar;Cruz-vega, Israel:
Chaotic Image Encryption Using Hopfield and Hindmarsh¿Rose Neurons Implemented on FPGA. Sensors. 2020. Vol: 20. Núm: 5. 10.3390/s20051326.
Chaotic Image Encryption Using Hopfield and Hindmarsh¿Rose Neurons Implemented on FPGA. Sensors. 2020. Vol: 20. Núm: 5. 10.3390/s20051326.
Diaz-fortuny, J;Sarazá, Pablo;Castro-López, Rafael;Roca, E.;Martin-martinez, Javier;Rodriguez, Rosana;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
Flexible Setup for the Measurement of CMOS Time-dependent Variability with Array-based Integrated Circuits. IEEE Transactions on Instrumentation and Measurement. 2020. Vol: 69. Núm: 3. Pág. 853-864. 10.1109/TIM.2019.2906415.
Flexible Setup for the Measurement of CMOS Time-dependent Variability with Array-based Integrated Circuits. IEEE Transactions on Instrumentation and Measurement. 2020. Vol: 69. Núm: 3. Pág. 853-864. 10.1109/TIM.2019.2906415.
Sarazá, Pablo;Martin-martinez, Javier;Castro-López, Rafael;Roca, E.;Rodriguez, Rosana;Nafria, Montserrat;Fernandez-Fernandez, Francisco V.:
A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors. Microelectronic Engineering. 2019. Vol: 215. 10.1016/j.mee.2019.111004.
A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors. Microelectronic Engineering. 2019. Vol: 215. 10.1016/j.mee.2019.111004.
F. Passos;Roca, Elisenda;Sieiro, Javier;Fiorelli-Martegani, Rafaella Bianca;Castro-López, Rafael;Lopez-villegas, Jose Maria;Fernandez-Fernandez, Francisco V.:
A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF Systems. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2019. Vol: 39. Núm: 3. Pág. 560-571. 10.1109/TCAD.2018.2890528 .
A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF Systems. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2019. Vol: 39. Núm: 3. Pág. 560-571. 10.1109/TCAD.2018.2890528 .
Moreira, Fabio ;Gonzalez-Echevarria, Reinier;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits. Soft Computing. 2018. 10.1007/s00500-018-3150-9.
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits. Soft Computing. 2018. 10.1007/s00500-018-3150-9.
Carbajal-gomez, Victor H.;Tlelo-cuautle, Esteban;Muñoz-pacheco, Jose M.;De La Fraga, Luis G.;Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.:
Optimization and CMOS Design of Chaotic Oscillators Robust to PVT Variations: INVITED. Integration. 2018. 10.1016/j.vlsi.2018.10.010.
Optimization and CMOS Design of Chaotic Oscillators Robust to PVT Variations: INVITED. Integration. 2018. 10.1016/j.vlsi.2018.10.010.
Diaz-fortuny, Javier;Nafria, Montserrat;Martin-martinez, Javier;Rodríguez, Rosana;Castro-López, Rafael;Roca, E.;Aragones, Xavier;Baraja, Enrique;Mateo, Diego;Fernandez-Fernandez, Francisco V.:
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI and HCI. IEEE Journal of Solid-State Circuits. 2018. 10.1109/JSSC.2018.2881923 .
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI and HCI. IEEE Journal of Solid-State Circuits. 2018. 10.1109/JSSC.2018.2881923 .
Diaz-fortuny, Javier;Martín-martínez, Javier;Rodriguez, Rosana;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Nafria, Montserrat:
A Smart Noise- and RTN-Removal Method for Parameter Extraction of CMOS Aging Compact Models. Solid-State Electronics. 2018.
A Smart Noise- and RTN-Removal Method for Parameter Extraction of CMOS Aging Compact Models. Solid-State Electronics. 2018.
Pak, Murat;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan:
A novel design methodology for the mixed-domain optimization of a MEMS accelerometer. Integration. 2018. Vol: 62. Pág. 314-321. 10.1016/j.vlsi.2018.03.018.
A novel design methodology for the mixed-domain optimization of a MEMS accelerometer. Integration. 2018. Vol: 62. Pág. 314-321. 10.1016/j.vlsi.2018.03.018.
Di Capua, Giulia ;Horta, Nuno;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan;Pennisi, Salvatore;Palumbo, Gaetano;Alioto, Massimo;Giustolisi, Gianluca:
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017 conferences. Integration. 2018. Vol: 63. Pág. 273-274. 10.1016/j.vlsi.2018.09.005.
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017 conferences. Integration. 2018. Vol: 63. Pág. 273-274. 10.1016/j.vlsi.2018.09.005.
Martins, Ricardo;Horta, Nuno;Lourenço, Nuno;Moreira, Fabio ;Povoa, Ricardo;Canelas, Antonio;Roca, E.;Castro-López, Rafael;Sieiro, Javier;Fernandez-Fernandez, Francisco V.:
Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2018. 10.1109/TCAD.2018.2834394.
Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2018. 10.1109/TCAD.2018.2834394.
Moreira, Fabio ;Martins, Ricardo;Lourenço, Nuno;Roca, E.;Povoa, Ricardo;Canelas, Antonio;Castro-López, Rafael;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integration. 2018. Vol: 63. Pág. 351-361. 10.1016/j.vlsi.2018.02.005.
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integration. 2018. Vol: 63. Pág. 351-361. 10.1016/j.vlsi.2018.02.005.
Carbajal-gomez, Victor H.;Tlelo-cuautle, Esteban ;Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.:
PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors. Electronics. 2018. Vol: 7. Núm: 10. 10.3390/electronics7100252.
PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors. Electronics. 2018. Vol: 7. Núm: 10. 10.3390/electronics7100252.
Ahyoune, Saiyd;Sieiro, Javier;Carrasco, Tomas;Vidal, Neus;Lopez-villegas, Jose Maria;Roca, E.;Fernandez-Fernandez, Francisco V.:
Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator. Integration. 2018. Vol: 63. Pág. 332-341. 10.1016/j.vlsi.2018.02.006.
Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator. Integration. 2018. Vol: 63. Pág. 332-341. 10.1016/j.vlsi.2018.02.006.
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
A comparison of automated RF circuit design methodologies: online versus offline passive component design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2018. Vol: 26. Núm: 11. Pág. 2386-2394. 10.1109/TVLSI.2018.2859827.
A comparison of automated RF circuit design methodologies: online versus offline passive component design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2018. Vol: 26. Núm: 11. Pág. 2386-2394. 10.1109/TVLSI.2018.2859827.
Moreira, Fabio ;Roca-Moreno, Elisenda;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
An inductor modeling and optimization toolbox for RF circuit design. Integration. 2017. Vol: 58. Pág. 463-472. 10.1016/j.vlsi.2017.01.009.
An inductor modeling and optimization toolbox for RF circuit design. Integration. 2017. Vol: 58. Pág. 463-472. 10.1016/j.vlsi.2017.01.009.
Gonzalez-Echevarria, Reinier;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Sieiro, Javier;Lopez-villegas, Jose Maria;Vidal, Neus:
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2017. Vol: 36. Núm: 1. Pág. 15-26. 10.1109/TCAD.2016.2564362.
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2017. Vol: 36. Núm: 1. Pág. 15-26. 10.1109/TCAD.2016.2564362.
Moreira, Fabio ;Ye, Yinghao;Spina, Domenico;Roca, E.;Castro-López, Rafael;Dhaene, Tom;Fernandez-Fernandez, Francisco V.:
Parametric macromodeling of integrated inductors for RF circuit design. Microwave and Optical Technology Letters. 2017. Vol: 59. Núm: 5. Pág. 1207-1212. 10.1002/mop.30498.
Parametric macromodeling of integrated inductors for RF circuit design. Microwave and Optical Technology Letters. 2017. Vol: 59. Núm: 5. Pág. 1207-1212. 10.1002/mop.30498.
Moreira, Fabio ;Roca, E.;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Radio-Frequency Inductor Synthesis Using Evolutionary Computation and Gaussian-Process Surrogate Modeling. Applied Soft Computing. 2017. Vol: 60. Pág. 495-507. 10.1016/j.asoc.2017.07.036.
Radio-Frequency Inductor Synthesis Using Evolutionary Computation and Gaussian-Process Surrogate Modeling. Applied Soft Computing. 2017. Vol: 60. Pág. 495-507. 10.1016/j.asoc.2017.07.036.
Horta, Nuno;Baschirotto, Andrea;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan;Goes, Joao;Fernandes, Jorge:
Introduction to the special issue on PRIME 2016 and SMACD 2016. Integration. 2017. Vol: 58. Pág. 411-412. 10.1016/j.vlsi.2017.03.015.
Introduction to the special issue on PRIME 2016 and SMACD 2016. Integration. 2017. Vol: 58. Pág. 411-412. 10.1016/j.vlsi.2017.03.015.
Pak, Murat;Fernandez-Fernandez, Francisco V.;Dundar, Gunhan:
Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis. Integration. 2016. Vol: 55. Pág. 357-365. 10.1016/j.vlsi.2016.04.004.
Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis. Integration. 2016. Vol: 55. Pág. 357-365. 10.1016/j.vlsi.2016.04.004.
Toro-frías, Antonio;Martín, Pablo;Martin-martinez, Javier;Castro-López, Rafael;Roca-Moreno, Elisenda;Nafría, Montserrat;Fernandez-Fernandez, Francisco V.:
Reliability simulation for analog ICs: Goals, Solutions and Challenges. Integration. 2016. Vol: 55. Pág. 341-348. http://dx.doi.org/10.1016/j.vlsi.2016.05.002 .
Reliability simulation for analog ICs: Goals, Solutions and Challenges. Integration. 2016. Vol: 55. Pág. 341-348. http://dx.doi.org/10.1016/j.vlsi.2016.05.002 .
Dundar, Gunhan;Horta, Nuno;Fernandez-Fernandez, Francisco V.:
Introduction to the special issue on SMACD 2015. Integration. 2015. Vol: 55. Pág. 293-294. 10.1016/j.vlsi.2016.09.001.
Introduction to the special issue on SMACD 2015. Integration. 2015. Vol: 55. Pág. 293-294. 10.1016/j.vlsi.2016.09.001.
Unutulmaz, Ahmet;Dundar, Gunhan;Fernandez-Fernandez, Francisco V.:
On the convex formulation of area for slicing floorplans. Integration. 2015. Vol: 50. Pág. 74-80. 10.1016/j.vlsi.2015.01.008.
On the convex formulation of area for slicing floorplans. Integration. 2015. Vol: 50. Pág. 74-80. 10.1016/j.vlsi.2015.01.008.
Kotti, Mouna;Gonzalez-Echevarria, Reinier;Fernandez-Fernandez, Francisco V.;Roca-Moreno, Elisenda;Sieiro, Javier;Castro-López, Rafael;Fakhfakh, Mourad;Lopez-villegas, Jose Maria:
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors. Analog Integrated Circuits and Signal Processing. 2014. Vol: 78. Núm: 1. Pág. 87-97. 10.1007/s10470-013-0230-8.
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors. Analog Integrated Circuits and Signal Processing. 2014. Vol: 78. Núm: 1. Pág. 87-97. 10.1007/s10470-013-0230-8.
Fernandez-Fernandez, Francisco V.;Roca-Moreno, Elisenda;Castro-López, Rafael:
Introduction to the special issue on SMACD2012. Analog Integrated Circuits and Signal Processing. 2014. Vol: 78. Núm: 1. Pág. 61-63. 10.1007/s10470-013-0227-3.
Introduction to the special issue on SMACD2012. Analog Integrated Circuits and Signal Processing. 2014. Vol: 78. Núm: 1. Pág. 61-63. 10.1007/s10470-013-0227-3.
Gonzalez-Echevarria, Reinier;Castro-López, Rafael;Roca, E.;Fernandez-Fernandez, Francisco V.;Sieiro, Javier;Vidal, Neus;López-villegas, José María:
Automated generation of the optimal performance trade-offs of integrated inductors. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2014. Vol: 33. Núm: 8. Pág. 1269-1273. 10.1109/TCAD.2014.2316092.
Automated generation of the optimal performance trade-offs of integrated inductors. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2014. Vol: 33. Núm: 8. Pág. 1269-1273. 10.1109/TCAD.2014.2316092.
Carbajal-gomez, Victor Hugo;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.;De La Fraga, Luis G.;Sanchez-Lopez, Carlos:
Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution. International Journal of Nonlinear Sciences and Numerical Simulation. 2014. Vol: 15. Núm: 1. Pág. 11-17. 10.1515/ijnsns-2011-0014.
Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution. International Journal of Nonlinear Sciences and Numerical Simulation. 2014. Vol: 15. Núm: 1. Pág. 11-17. 10.1515/ijnsns-2011-0014.
Carbajal-gomez, Victor Hugo;Tlelo-cuautle, Esteban;Fernandez-Fernandez, Francisco V.:
Optimizing the positive Lyapunov exponent in multi-scroll chaotic oscillators with differential evolution algorithm. Applied Mathematics and Computation. 2013. Vol: 219. Núm: 15. Pág. 8163-8168. http://dx.doi.org/10.1016/j.amc.2013.01.072.
Optimizing the positive Lyapunov exponent in multi-scroll chaotic oscillators with differential evolution algorithm. Applied Mathematics and Computation. 2013. Vol: 219. Núm: 15. Pág. 8163-8168. http://dx.doi.org/10.1016/j.amc.2013.01.072.
Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.;Carbajal-gomez, Victor Hugo;Tlelo-cuautle, Esteban;Mendoza-López, Jorge:
Behavioral modeling of SNFS for synthesizing multi-scroll chaotic attractors. International Journal of Nonlinear Sciences and Numerical Simulation. 2013. Vol: 14. Núm: 7-8. Pág. 463-469. 10.1515/ijnsns-2011-0052.
Behavioral modeling of SNFS for synthesizing multi-scroll chaotic attractors. International Journal of Nonlinear Sciences and Numerical Simulation. 2013. Vol: 14. Núm: 7-8. Pág. 463-469. 10.1515/ijnsns-2011-0052.
Liu, Bo;Zhang, Qingfu ;Fernandez-Fernandez, Francisco V.;Gielen, Georges:
An efficient evolutionary algorithm for chance-constrained bi-objective stochastic optimization and its application to manufacturing engineering. IEEE Transactions on Evolutionary Computation. 2013. Vol: 17. Núm: 6. Pág. 786-796. 10.1109/TEVC.2013.2244898.
An efficient evolutionary algorithm for chance-constrained bi-objective stochastic optimization and its application to manufacturing engineering. IEEE Transactions on Evolutionary Computation. 2013. Vol: 17. Núm: 6. Pág. 786-796. 10.1109/TEVC.2013.2244898.
Roca-Moreno, Elisenda;Velasco-Jiménez, Manuel;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.:
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers . Analog Integrated Circuits and Signal Processing. 2012. Vol: 73. Núm: 1. Pág. 65-76. 10.1007/s10470-011-9785-4.
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers . Analog Integrated Circuits and Signal Processing. 2012. Vol: 73. Núm: 1. Pág. 65-76. 10.1007/s10470-011-9785-4.
Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.;Tlelo-cuautle, Esteban;Tan, Sheldon:
Pathological element-based active device models and their application to symbolic analysis. IEEE Transactions on Circuits and Systems. Part 1: Regular Papers. 2011. Vol: 58. Núm: 6. Pág. 1382-1395.
Pathological element-based active device models and their application to symbolic analysis. IEEE Transactions on Circuits and Systems. Part 1: Regular Papers. 2011. Vol: 58. Núm: 6. Pág. 1382-1395.
Liu, Bo;Fernandez-Fernandez, Francisco V.;Gielen, Georges:
Efficient and accurate statistical analog yield optimization and variation-aware circuit sizing based on computational intelligence techniques. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2011. Vol: 30. Núm: 6. Pág. 793-805. 10.1109/TCAD.2011.2106850 .
Efficient and accurate statistical analog yield optimization and variation-aware circuit sizing based on computational intelligence techniques. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2011. Vol: 30. Núm: 6. Pág. 793-805. 10.1109/TCAD.2011.2106850 .
Sanchez-Lopez, Carlos;Fernandez-Fernandez, Francisco V.;Tlelo-Cuautle-, E.:
GENERALIZED ADMITTANCE MATRIX MODELS OF OTRAS AND COAS. Microelectronics Journal. 2010. Vol: 41. Núm: 8. Pág. 502-505. 10.1016/j.mejo.2010.06.010.
GENERALIZED ADMITTANCE MATRIX MODELS OF OTRAS AND COAS. Microelectronics Journal. 2010. Vol: 41. Núm: 8. Pág. 502-505. 10.1016/j.mejo.2010.06.010.
Rosa-Utrera, Jose Manuel De La;Castro-López, Rafael;Morgado-García De Polavieja, Alonso;Becerra-Alvarez, Edwin Christian;Rio-Fernandez, Rocio Del;Fernandez-Fernandez, Francisco V.;Perez-Verdu, Maria Belen:
ADAPTIVE CMOS ANALOG CIRCUITS FOR 4G MOBILE TERMINALS-REVIEW AND STATE-OF-THE-ART SURVEY. Microelectronics Journal. 2009. Vol: 40. Núm: 1. Pág. 156-176.
ADAPTIVE CMOS ANALOG CIRCUITS FOR 4G MOBILE TERMINALS-REVIEW AND STATE-OF-THE-ART SURVEY. Microelectronics Journal. 2009. Vol: 40. Núm: 1. Pág. 156-176.
Liu-,Bo;Wang-,Yan;Yu-,Zhiping;Liu-,Leibo;Li-,Miao;Wang-,Zheng;Lu-,Jing;Fernandez-Fernandez, Francisco V.:
ANALOG CIRCUIT OPTIMIZATION SYSTEM BASED ON HYBRID EVOLUTIONARY ALGORITHMS. Integration. 2009. Vol: 42. Núm: 2. Pág. 137-148.
ANALOG CIRCUIT OPTIMIZATION SYSTEM BASED ON HYBRID EVOLUTIONARY ALGORITHMS. Integration. 2009. Vol: 42. Núm: 2. Pág. 137-148.
Liu-,Bo;Fernandez-Fernandez, Francisco V.;Gielen-,G.;Castro-López, Rafael;Roca-Moreno, Elisenda:
A MEMETIC APPROACH TO THE AUTOMATIC DESIGN OF HIGH PERFORMANCE ANALOG INTEGRATED CIRCUITS. ACM Transactions on Design Automation of Electronic Systems. 2009. Pág. 0-0.
A MEMETIC APPROACH TO THE AUTOMATIC DESIGN OF HIGH PERFORMANCE ANALOG INTEGRATED CIRCUITS. ACM Transactions on Design Automation of Electronic Systems. 2009. Pág. 0-0.
Castro-López, Rafael;Morgado-García De Polavieja, Alonso;Guerra-Vinuesa, Oscar;Rio-Fernandez, Rocio Del;Rosa-Utrera, Jose Manuel De La;Perez-Verdu, Maria Belen;Fernandez-Fernandez, Francisco V.:
SYSTEMATIC TOP-DOWN DESIGN OF RECONFIGURABLE SD MODULATORS FOR MULTI-STANDARD TRANSCEIVERS. Analog Integrated Circuits and Signal Processing. 2009. Vol: 58. Núm: 3. Pág. 227-241.
SYSTEMATIC TOP-DOWN DESIGN OF RECONFIGURABLE SD MODULATORS FOR MULTI-STANDARD TRANSCEIVERS. Analog Integrated Circuits and Signal Processing. 2009. Vol: 58. Núm: 3. Pág. 227-241.
Castro-López, Rafael;Rodriguez De Llera-,Delia;Ismail-,Mohammed;Fernandez-Fernandez, Francisco V.:
AMS/RF-CMOS CIRCUIT DESIGN FOR WIRELESS TRANSCEIVERS. Integration. 2009. Vol: 42. Núm: 1. Pág. 1-2.
AMS/RF-CMOS CIRCUIT DESIGN FOR WIRELESS TRANSCEIVERS. Integration. 2009. Vol: 42. Núm: 1. Pág. 1-2.
Castro-López, Rafael;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
MULTIMODE PARETO FRONTS FOR DESIGN OF RECONFIGURABLE ANALOGUE CIRCUITS. Electronics Letters. 2009. Vol: 45. Núm: 2. Pág. 95-97.
MULTIMODE PARETO FRONTS FOR DESIGN OF RECONFIGURABLE ANALOGUE CIRCUITS. Electronics Letters. 2009. Vol: 45. Núm: 2. Pág. 95-97.
Fernandez-Fernandez, Francisco V.:
EDITORIAL. Integration. 2008. Vol: 41. Núm: 3. Pág. 317-318.
EDITORIAL. Integration. 2008. Vol: 41. Núm: 3. Pág. 317-318.
Tortosa-,R.;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
CLOCK JITTER ERROR IN MULTI-BIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NON-RETURN-TO-ZERO FEEDBACK WAVEFORM. Microelectronics Journal. 2008. Vol: 39. Núm: 1. Pág. 137-151.
CLOCK JITTER ERROR IN MULTI-BIT CONTINUOUS-TIME SIGMA-DELTA MODULATORS WITH NON-RETURN-TO-ZERO FEEDBACK WAVEFORM. Microelectronics Journal. 2008. Vol: 39. Núm: 1. Pág. 137-151.
Tortosa-,R.;Castro-López, Rafael;Rosa-Utrera, Jose Manuel De La;Roca-Moreno, Elisenda;Rodriguez-Vazquez, Angel;Fernandez-Fernandez, Francisco V.:
SYSTEMATIC DESIGN OF HIGH-RESOLUTION HIGH-FREQUENCY CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATORS. ETRI Journal. 2008. Vol: 30. Núm: 4. Pág. 535-545.
SYSTEMATIC DESIGN OF HIGH-RESOLUTION HIGH-FREQUENCY CASCADE CONTINUOUS-TIME SIGMA-DELTA MODULATORS. ETRI Journal. 2008. Vol: 30. Núm: 4. Pág. 535-545.
Morgado-García De Polavieja, Alonso;Rivas-Bastante, Vicente Javier;Rio-Fernandez, Rocio Del;Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Rosa-Utrera, Jose Manuel De La:
BEHAVIORAL MODELING, SIMULATION AND SYNTHESIS OF MULTI-STANDARD WIRELESS RECEIVERS IN MATLAB/SIMULINK. Integration. 2008. Vol: 41. Núm: 2. Pág. 269-280.
BEHAVIORAL MODELING, SIMULATION AND SYNTHESIS OF MULTI-STANDARD WIRELESS RECEIVERS IN MATLAB/SIMULINK. Integration. 2008. Vol: 41. Núm: 2. Pág. 269-280.
Castro-López, Rafael;Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.:
AN INTEGRATED LAYOUT-SYNTHESIS APPROACH FOR ANALOG ICS. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2008. Vol: 27. Núm: 7. Pág. 1179-1189.
AN INTEGRATED LAYOUT-SYNTHESIS APPROACH FOR ANALOG ICS. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2008. Vol: 27. Núm: 7. Pág. 1179-1189.
Tortosa-Navas, Ramon;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A NEW HIGH-LEVEL SYNTHESIS METHODOLOGY OF CASCADED CONTINUOUS-TIME SIGMA DELTA MODULATORS. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 2006. Vol: 53. Núm: 8. Pág. 739-743.
A NEW HIGH-LEVEL SYNTHESIS METHODOLOGY OF CASCADED CONTINUOUS-TIME SIGMA DELTA MODULATORS. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 2006. Vol: 53. Núm: 8. Pág. 739-743.
Morgado-García De Polavieja, Alonso;Rosa-Utrera, Jose Manuel De La;Rio-Fernandez, Rocio Del;Medeiro-Hidalgo, Fernando Manuel;Perez-Verdu, Maria Belen;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
AN APPROACH TO THE DESIGN OF CASCADE SIGMA/DELTA MODULATORS FOR MULTISTANDARD WIRELESS TRANSCEIVERS. WSEAS Transactions on Circuits and Systems. 2005. Vol: 4. Núm: 12. Pág. 1811-1818.
AN APPROACH TO THE DESIGN OF CASCADE SIGMA/DELTA MODULATORS FOR MULTISTANDARD WIRELESS TRANSCEIVERS. WSEAS Transactions on Circuits and Systems. 2005. Vol: 4. Núm: 12. Pág. 1811-1818.
Ruiz-Amaya, Jesus;Rosa-Utrera, Jose Manuel De La;Fernandez-Fernandez, Francisco V.;Medeiro-Hidalgo, Fernando Manuel;Rio-Fernandez, Rocio Del;Perez-Verdu, Maria Belen;Rodriguez-Vazquez, Angel:
HIGH-LEVEL SYNTHESIS OF SWITCHED-CAPACITOR, SWITCHED-CURRENT AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS USING SIMULINK-BASED TIME-DOMAIN BEHAVIOURAL M. IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications. 2005. Vol: 52. Núm: 9. Pág. 1795-1810.
HIGH-LEVEL SYNTHESIS OF SWITCHED-CAPACITOR, SWITCHED-CURRENT AND CONTINUOUS-TIME SIGMA-DELTA MODULATORS USING SIMULINK-BASED TIME-DOMAIN BEHAVIOURAL M. IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications. 2005. Vol: 52. Núm: 9. Pág. 1795-1810.
Castro-López, Rafael;Guerra-Vinuesa, Oscar;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
SYNTHESIS OF A WIRELESS COMMUNICATION ANALOG BACK-END BASED ON A MISMATCH-AWARE SYMBOLIC APPROACH. Analog Integrated Circuits and Signal Processing. 2004. Vol: 40. Núm: 3. Pág. 215-233.
SYNTHESIS OF A WIRELESS COMMUNICATION ANALOG BACK-END BASED ON A MISMATCH-AWARE SYMBOLIC APPROACH. Analog Integrated Circuits and Signal Processing. 2004. Vol: 40. Núm: 3. Pág. 215-233.
Fernandez-Fernandez, Francisco V.:
ANALOG AND MIXED-SIGNAL IC DESIGN AND DESIGN METHODOLOGIES. Integration. 2003. Vol: 36. Núm: 4. Pág. 157-159.
ANALOG AND MIXED-SIGNAL IC DESIGN AND DESIGN METHODOLOGIES. Integration. 2003. Vol: 36. Núm: 4. Pág. 157-159.
Guerra-Vinuesa, Oscar;Rodríguez-García-,J.D.;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
A SYMBOLIC POLE/ZERO EXTRACTION METHODOLOGY BASED ON ANALYSIS OF CIRCUIT TIME-CONSTANTS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 31. Núm: 2. Pág. 101-117.
A SYMBOLIC POLE/ZERO EXTRACTION METHODOLOGY BASED ON ANALYSIS OF CIRCUIT TIME-CONSTANTS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 31. Núm: 2. Pág. 101-117.
Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
APPROXIMATE SYMBOLIC ANALYSIS OF HIERARCHICALLY DECOMPOSED ANALOG CIRCUITS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 31. Núm: 2. Pág. 131-145.
APPROXIMATE SYMBOLIC ANALYSIS OF HIERARCHICALLY DECOMPOSED ANALOG CIRCUITS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 31. Núm: 2. Pág. 131-145.
Castro-López, Rafael;Fernandez-Fernandez, Francisco V.;Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Vazquez, Angel:
GENERATION OF TECHNOLOGY-INDEPENDENT RETARGETABLE ANALOG BLOCKS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 33. Núm: 2. Pág. 157-170.
GENERATION OF TECHNOLOGY-INDEPENDENT RETARGETABLE ANALOG BLOCKS. Analog Integrated Circuits and Signal Processing. 2002. Vol: 33. Núm: 2. Pág. 157-170.
Guerra-Vinuesa, Oscar;Roca-Moreno, Elisenda;Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel:
ERROR CONTROL IN SIMPLIFICATION BEFORE GENERATION ALGORITHMS FOR SYMBOLIC ANALYSIS OF LARGE ANALOGUE CIRCUITS. Electronics Letters. 1999. Vol: 35. Núm: 4. Pág. 260-261.
ERROR CONTROL IN SIMPLIFICATION BEFORE GENERATION ALGORITHMS FOR SYMBOLIC ANALYSIS OF LARGE ANALOGUE CIRCUITS. Electronics Letters. 1999. Vol: 35. Núm: 4. Pág. 260-261.
Fernandez-Fernandez, Francisco V.;Guerra-Vinuesa, Oscar;Rodriguez-garcia, Juan David;Rodriguez-Vazquez, Angel:
CORRECTION TO SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS: THE NUMERICAL REFERENCE GENERATION PROBLEM. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 1999. Vol: 46. Pág. 485-485.
CORRECTION TO SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS: THE NUMERICAL REFERENCE GENERATION PROBLEM. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 1999. Vol: 46. Pág. 485-485.
Fernandez-Fernandez, Francisco V.;Guerra-Vinuesa, Oscar;Rodríguez-García-,J.D.;Rodriguez-Vazquez, Angel:
SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS: THE NUMERICAL REFERENCE GENERATION PROBLEM. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 1998. Vol: 45. Núm: 10. Pág. 1351-1361.
SYMBOLIC ANALYSIS OF LARGE ANALOG INTEGRATED CIRCUITS: THE NUMERICAL REFERENCE GENERATION PROBLEM. IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing. 1998. Vol: 45. Núm: 10. Pág. 1351-1361.
Wambacq-,P.;Fernandez-Fernandez, Francisco V.;Gielen-,G.;Sansen-,W.;Rodriguez-Vazquez, Angel:
EFFICIENT SYMBOLIC COMPUTATION OF APPROXIMATED SMALL-SIGNAL CHARACTERISTICS OF ANALOG INTEGRATED-CIRCUITS. IEEE Journal of Solid-State Circuits. 1995. Vol: 30. Núm: 3. Pág. 327-330.
EFFICIENT SYMBOLIC COMPUTATION OF APPROXIMATED SMALL-SIGNAL CHARACTERISTICS OF ANALOG INTEGRATED-CIRCUITS. IEEE Journal of Solid-State Circuits. 1995. Vol: 30. Núm: 3. Pág. 327-330.
Medeiro-Hidalgo, Fernando Manuel;Rodriguez-Macias, Rafael;Fernandez-Fernandez, Francisco V.;Dominguez-Castro, Rafael;Huertas-Diaz, Jose Luis;Rodriguez-Vazquez, Angel:
Global Design of Analog Cells Using Statistical Optimization Techniques. Analog Integrated Circuits and Signal Processing. 1994. Vol: 6. Núm: 3. Pág. 179-195.
Global Design of Analog Cells Using Statistical Optimization Techniques. Analog Integrated Circuits and Signal Processing. 1994. Vol: 6. Núm: 3. Pág. 179-195.
Wambacq-,P.;Fernandez-Fernandez, Francisco V.;Gielen-,G.;Sansen-,W.;Rodriguez-Vazquez, Angel:
ALGORITHM FOR EFFICIENT SYMBOLIC ANALYSIS OF LARGE ANALOG CIRCUITS. Electronics Letters. 1994. Vol: 30. Núm: 14. Pág. 1108-1109.
ALGORITHM FOR EFFICIENT SYMBOLIC ANALYSIS OF LARGE ANALOG CIRCUITS. Electronics Letters. 1994. Vol: 30. Núm: 14. Pág. 1108-1109.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martín-,J.D;Huertas-Diaz, Jose Luis:
APPROXIMATING NESTED FORMAT SYMBOLIC EXPRESSIONS. Alta Frequenza Rivista Di Elettronica. 1993. Vol: 5. Núm: 6. Pág. 326-335.
APPROXIMATING NESTED FORMAT SYMBOLIC EXPRESSIONS. Alta Frequenza Rivista Di Elettronica. 1993. Vol: 5. Núm: 6. Pág. 326-335.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Martin, Juan Domingo;Huertas-Diaz, Jose Luis:
Formula Approximation for Flat and Hierarchical Symbolic Analysis. Analog Integrated Circuits and Signal Processing. 1993. Vol: 3. Núm: 1. Pág. 43-58.
Formula Approximation for Flat and Hierarchical Symbolic Analysis. Analog Integrated Circuits and Signal Processing. 1993. Vol: 3. Núm: 1. Pág. 43-58.
Wambacq-,P.;Fernandez-Fernandez, Francisco V.;Gielen-,G.;Sansen-,W.:
APPROXIMATION DURING EXPRESSION GENERATION IN SYMBOLIC ANALYSIS OF ANALOG INTEGRATED CIRCUITS. Alta Frequenza Rivista Di Elettronica. 1993. Pág. 336-343.
APPROXIMATION DURING EXPRESSION GENERATION IN SYMBOLIC ANALYSIS OF ANALOG INTEGRATED CIRCUITS. Alta Frequenza Rivista Di Elettronica. 1993. Pág. 336-343.
Fernandez-Fernandez, Francisco V.;Rodriguez-Vazquez, Angel;Huertas-Diaz, Jose Luis:
INTERACTIVE AC MODELING AND CHARACTERIZATION OF ANALOG CIRCUITS VIA SYMBOLIC ANALYSIS. Analog Integrated Circuits and Signal Processing. 1991. Vol: 1. Pág. 183-208.
INTERACTIVE AC MODELING AND CHARACTERIZATION OF ANALOG CIRCUITS VIA SYMBOLIC ANALYSIS. Analog Integrated Circuits and Signal Processing. 1991. Vol: 1. Pág. 183-208.
Patentes
Fernandez-Fernandez, Francisco V.: ASAP (Automatic Symbolic Analysis Program). Número de patente:
Tesis dirigidas o codirigidas
Martín, Pablo:
Impacto de la variabilidad dependiente del tiempo en circuitos integrados en tecnologías nanométricas: modelado, simulación y caracterización experime. Tesis Doctoral. 2021
Impacto de la variabilidad dependiente del tiempo en circuitos integrados en tecnologías nanométricas: modelado, simulación y caracterización experime. Tesis Doctoral. 2021
Sarazá, Pablo:
Study of variability phenomena on CMOS technologies for its mitigation and exploitation. Tesis Doctoral. 2021
Study of variability phenomena on CMOS technologies for its mitigation and exploitation. Tesis Doctoral. 2021
F. Passos:
Una aproximación multinivel para el diseño sistemático de circuitos integrados de radiofrecuencia. Tesis Doctoral. 2018
Una aproximación multinivel para el diseño sistemático de circuitos integrados de radiofrecuencia. Tesis Doctoral. 2018
(Doctorando no grabado):
Diseño de circuitos analógicos y de señal mixta con consideraciones de diseño fisico y variabilidad. Tesis Doctoral. 2017
Diseño de circuitos analógicos y de señal mixta con consideraciones de diseño fisico y variabilidad. Tesis Doctoral. 2017
Unutulmaz, Ahmet:
Layout-aware synthesis of high-performance electronic circuits. Tesis Doctoral. 2014
Layout-aware synthesis of high-performance electronic circuits. Tesis Doctoral. 2014
Castro-López, Rafael:
METODOLOGÍAS Y HERRAMIENTAS DE REUSABILIDAD EN EL DISEÑO DE CIRCUITOS INTEGRADOS ANALÓGICOS Y DE SEÑAL MIXTA. Tesis Doctoral. 2005
METODOLOGÍAS Y HERRAMIENTAS DE REUSABILIDAD EN EL DISEÑO DE CIRCUITOS INTEGRADOS ANALÓGICOS Y DE SEÑAL MIXTA. Tesis Doctoral. 2005
Guerra-Vinuesa, Oscar:
TÉCNICAS AVANZADAS PARA EL ANÁLISIS SIMBÓLICO APROXIMADO DE CIRCUITOS INTEGRADOS ANALÓGICOS. Tesis Doctoral. 2002
TÉCNICAS AVANZADAS PARA EL ANÁLISIS SIMBÓLICO APROXIMADO DE CIRCUITOS INTEGRADOS ANALÓGICOS. Tesis Doctoral. 2002
